eric2.t2.smt2

loading
details
attribute value
description
owner Johannes Waldmann
uploaded 2017-08-17 03:45:05.0
disk size 17.61 KB
downloadable true
type
attribute value
name no_type
processor id 1
description this is the default benchmark type for rejected benchmarks and benchmarks that are not associated with a type.
owning community none
loading contents
(declare-sort Loc 0)
(declare-const l0 Loc)
(declare-const l1 Loc)
(declare-const l2 Loc)
(declare-const l3 Loc)
(declare-const l4 Loc)
(declare-const l5 Loc)
(declare-const l6 Loc)
(declare-const l7 Loc)
(assert (distinct l0 l1 l2 l3 l4 l5 l6 l7))

(define-fun cfg_init ( (pc Loc) (src Loc) (rel Bool) ) Bool
  (and (= pc src) rel))

(define-fun cfg_trans2 ( (pc Loc) (src Loc)
                         (pc1 Loc) (dst Loc)
                         (rel Bool) ) Bool
  (and (= pc src) (= pc1 dst) rel))

(define-fun cfg_trans3 ( (pc Loc) (exit Loc)
                         (pc1 Loc) (call Loc)
                         (pc2 Loc) (return Loc)
                         (rel Bool) ) Bool
  (and (= pc exit) (= pc1 call) (= pc2 return) rel))

(define-fun init_main ( (pc^0 Loc) (hda_1^0 Int) (hda_3^0 Int) (hda_4^0 Int) (hdb_2^0 Int) (hdb_3^0 Int) (hdb_5^0 Int) (hdc_2^0 Int) (hdc_3^0 Int) (hdc_5^0 Int) (hdd_4^0 Int) (hde_5^0 Int) (hdf_5^0 Int) (hdg_5^0 Int) (op1a_0^0 Int) (op1a_1^0 Int) (op1a_2^0 Int) (op1a_3^0 Int) (op1a_4^0 Int) (op1a_5^0 Int) (op1b_5^0 Int) (op2a_1^0 Int) (op2a_3^0 Int) (op2a_4^0 Int) (op2b_2^0 Int) (op2b_3^0 Int) (op2b_5^0 Int) (op2c_4^0 Int) (op2d_5^0 Int) (t5^0 Int) ) Bool
  (cfg_init pc^0 l7 true))

(define-fun next_main (
                 (pc^0 Loc) (hda_1^0 Int) (hda_3^0 Int) (hda_4^0 Int) (hdb_2^0 Int) (hdb_3^0 Int) (hdb_5^0 Int) (hdc_2^0 Int) (hdc_3^0 Int) (hdc_5^0 Int) (hdd_4^0 Int) (hde_5^0 Int) (hdf_5^0 Int) (hdg_5^0 Int) (op1a_0^0 Int) (op1a_1^0 Int) (op1a_2^0 Int) (op1a_3^0 Int) (op1a_4^0 Int) (op1a_5^0 Int) (op1b_5^0 Int) (op2a_1^0 Int) (op2a_3^0 Int) (op2a_4^0 Int) (op2b_2^0 Int) (op2b_3^0 Int) (op2b_5^0 Int) (op2c_4^0 Int) (op2d_5^0 Int) (t5^0 Int)
                 (pc^post Loc) (hda_1^post Int) (hda_3^post Int) (hda_4^post Int) (hdb_2^post Int) (hdb_3^post Int) (hdb_5^post Int) (hdc_2^post Int) (hdc_3^post Int) (hdc_5^post Int) (hdd_4^post Int) (hde_5^post Int) (hdf_5^post Int) (hdg_5^post Int) (op1a_0^post Int) (op1a_1^post Int) (op1a_2^post Int) (op1a_3^post Int) (op1a_4^post Int) (op1a_5^post Int) (op1b_5^post Int) (op2a_1^post Int) (op2a_3^post Int) (op2a_4^post Int) (op2b_2^post Int) (op2b_3^post Int) (op2b_5^post Int) (op2c_4^post Int) (op2d_5^post Int) (t5^post Int)
             ) Bool
  (or
    (cfg_trans2 pc^0 l0 pc^post l1 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (<= 0 (+ 0 op1a_0^0)) (<= (+ 0 op1a_1^0) 0)) (<= 0 (+ 0 op1a_1^0))) (<= (+ 0 op2a_1^0) 0)) (<= 0 (+ 0 op2a_1^0))) (<= (+ 0 hda_1^0) 0)) (<= 0 (+ 0 hda_1^0))) (<= (+ 0 op1a_2^0) 0)) (<= 0 (+ 0 op1a_2^0))) (<= (+ 0 op2b_2^0) 0)) (<= 0 (+ 0 op2b_2^0))) (<= (+ 0 hdb_2^0) 0)) (<= 0 (+ 0 hdb_2^0))) (<= (+ 0 hdc_2^0) 0)) (<= 0 (+ 0 hdc_2^0))) (<= (+ 0 op1a_3^0) 0)) (<= 0 (+ 0 op1a_3^0))) (<= (+ 0 op2a_3^0) 0)) (<= 0 (+ 0 op2a_3^0))) (<= (+ 0 op2b_3^0) 0)) (<= 0 (+ 0 op2b_3^0))) (<= (+ 0 hda_3^0) 0)) (<= 0 (+ 0 hda_3^0))) (<= (+ 0 hdb_3^0) 0)) (<= 0 (+ 0 hdb_3^0))) (<= (+ 0 hdc_3^0) 0)) (<= 0 (+ 0 hdc_3^0))) (<= (+ 0 op1a_4^0) 0)) (<= 0 (+ 0 op1a_4^0))) (<= (+ 0 op2a_4^0) 0)) (<= 0 (+ 0 op2a_4^0))) (<= (+ 0 op2c_4^0) 0)) (<= 0 (+ 0 op2c_4^0))) (<= (+ 0 hda_4^0) 0)) (<= 0 (+ 0 hda_4^0))) (<= (+ 0 hdd_4^0) 0)) (<= 0 (+ 0 hdd_4^0))) (<= (+ 0 op1a_5^0) 0)) (<= 0 (+ 0 op1a_5^0))) (<= (+ 0 op1b_5^0) 0)) (<= 0 (+ 0 op1b_5^0))) (<= (+ 0 op2b_5^0) 0)) (<= 0 (+ 0 op2b_5^0))) (<= (+ 0 op2d_5^0) 0)) (<= 0 (+ 0 op2d_5^0))) (<= (+ 0 hdb_5^0) 0)) (<= 0 (+ 0 hdb_5^0))) (<= (+ 0 hdc_5^0) 0)) (<= 0 (+ 0 hdc_5^0))) (<= (+ 0 hde_5^0) 0)) (<= 0 (+ 0 hde_5^0))) (<= (+ 0 hdf_5^0) 0)) (<= 0 (+ 0 hdf_5^0))) (<= (+ 0 hdg_5^0) 0)) (<= 0 (+ 0 hdg_5^0))) (= hda_1^0 hda_1^post)) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_1^0 op1a_1^post)) (= op1a_2^0 op1a_2^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l2 pc^post l1 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= op1a_0^post (+ (+ 0 op1a_0^0) op1a_3^0)) (= op1a_3^post 0)) (= hda_1^0 hda_1^post)) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_1^0 op1a_1^post)) (= op1a_2^0 op1a_2^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l2 pc^post l3 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= op1a_1^post (+ (+ 0 op1a_1^0) op1a_3^0)) (= op2a_1^post (+ (+ 0 op2a_1^0) op2a_3^0))) (= hda_1^post (+ (+ 0 hda_1^0) hda_3^0))) (= op1a_3^post 0)) (= op2a_3^post 0)) (= hda_3^post 0)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_2^0 op1a_2^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l2 pc^post l4 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= op1a_2^post (+ (+ 0 op1a_2^0) op1a_3^0)) (= op2b_2^post (+ (+ 0 op2b_2^0) op2b_3^0))) (= hdb_2^post (+ (+ 0 hdb_2^0) hdb_3^0))) (= hdc_2^post (+ (+ 0 hdc_2^0) hdc_3^0))) (= op1a_3^post 0)) (= op2b_3^post 0)) (= hdb_3^post 0)) (= hdc_3^post 0)) (= hda_1^0 hda_1^post)) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_5^0 hdb_5^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_1^0 op1a_1^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l4 pc^post l5 (exists ( (hdb_2^1 Int) (hdb_5^1 Int) (hdc_2^1 Int) (hdc_5^1 Int) (hde_5^1 Int) (hdf_5^1 Int) (hdg_5^1 Int) (op1a_2^1 Int) (op1a_5^1 Int) (op1b_5^1 Int) (op2b_2^1 Int) (op2b_5^1 Int) (op2d_5^1 Int) ) (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (<= 1 (+ 0 t5^0)) (<= (+ 0 t5^0) (+ 0 op2b_2^0))) (<= (+ 0 t5^0) (+ 0 hdb_2^0))) (<= 1 (+ 0 hdc_2^0))) (= op1a_5^1 (+ (+ 0 op1a_2^0) op1a_5^0))) (= op1b_5^1 (+ 1 op1b_5^0))) (= op2b_5^1 (+ (+ (+ 0 op2b_2^0) op2b_5^0) (* -1 t5^0)))) (= op2d_5^1 (+ (+ -1 op2d_5^0) t5^0))) (= hdb_5^1 (+ (+ (+ 0 hdb_2^0) hdb_5^0) (* -1 t5^0)))) (= hdc_5^1 (+ (+ -1 hdc_2^0) hdc_5^0))) (= hde_5^1 (+ (+ -1 hde_5^0) t5^0))) (= hdf_5^1 (+ 1 hdf_5^0))) (= hdg_5^1 (+ 1 hdg_5^0))) (= op1a_2^1 0)) (= op2b_2^1 0)) (= hdb_2^1 0)) (= hdc_2^1 0)) (= t5^post t5^post)) (= op1a_2^post (+ (+ (+ 0 op1a_2^1) op1a_5^1) op1b_5^1))) (= op2b_2^post (+ (+ (+ 0 op2b_2^1) op2b_5^1) op2d_5^1))) (= hdb_2^post (+ (+ (+ (+ 0 hdb_2^1) hdb_5^1) hde_5^1) hdg_5^1))) (= hdc_2^post (+ (+ (+ 0 hdc_2^1) hdc_5^1) hdf_5^1))) (= op1a_5^post 0)) (= op1b_5^post 0)) (= op2b_5^post 0)) (= op2d_5^post 0)) (= hdb_5^post 0)) (= hdc_5^post 0)) (= hde_5^post 0)) (= hdf_5^post 0)) (= hdg_5^post 0)) (= hda_1^0 hda_1^post)) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_3^0 hdb_3^post)) (= hdc_3^0 hdc_3^post)) (= hdd_4^0 hdd_4^post)) (= op1a_0^0 op1a_0^post)) (= op1a_1^0 op1a_1^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_3^0 op2b_3^post)) (= op2c_4^0 op2c_4^post))))
    (cfg_trans2 pc^0 l5 pc^post l4 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= hda_1^0 hda_1^post) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_1^0 op1a_1^post)) (= op1a_2^0 op1a_2^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l4 pc^post l2 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (<= 1 (+ 0 op1a_2^0)) (= op1a_3^post (+ (+ -1 op1a_2^0) op1a_3^0))) (= op2a_3^post (+ 1 op2a_3^0))) (= op2b_3^post (+ (+ 0 op2b_2^0) op2b_3^0))) (= hda_3^post (+ 1 hda_3^0))) (= hdb_3^post (+ (+ 0 hdb_2^0) hdb_3^0))) (= hdc_3^post (+ (+ 0 hdc_2^0) hdc_3^0))) (= op1a_2^post 0)) (= op2b_2^post 0)) (= hdb_2^post 0)) (= hdc_2^post 0)) (= hda_1^0 hda_1^post)) (= hda_4^0 hda_4^post)) (= hdb_5^0 hdb_5^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_1^0 op1a_1^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_4^0 op2a_4^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l4 pc^post l1 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= op1a_0^post (+ (+ 0 op1a_0^0) op1a_2^0)) (= op1a_2^post 0)) (= hda_1^0 hda_1^post)) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_1^0 op1a_1^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l3 pc^post l6 (exists ( (hda_1^1 Int) (hda_4^1 Int) (hdd_4^1 Int) (op1a_1^1 Int) (op1a_4^1 Int) (op2a_1^1 Int) (op2a_4^1 Int) (op2c_4^1 Int) ) (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (<= 1 (+ 0 op1a_1^0)) (= op1a_4^1 (+ (+ -1 op1a_1^0) op1a_4^0))) (= op2a_4^1 (+ (+ 0 op2a_1^0) op2a_4^0))) (= op2c_4^1 (+ 1 op2c_4^0))) (= hda_4^1 (+ (+ 0 hda_1^0) hda_4^0))) (= hdd_4^1 (+ 1 hdd_4^0))) (= op1a_1^1 0)) (= op2a_1^1 0)) (= hda_1^1 0)) (= op1a_1^post (+ (+ 0 op1a_1^1) op1a_4^1))) (= op2a_1^post (+ (+ (+ 0 op2a_1^1) op2a_4^1) op2c_4^1))) (= hda_1^post (+ (+ (+ 0 hda_1^1) hda_4^1) hdd_4^1))) (= op1a_4^post 0)) (= op2a_4^post 0)) (= op2c_4^post 0)) (= hda_4^post 0)) (= hdd_4^post 0)) (= hda_3^0 hda_3^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_2^0 op1a_2^post)) (= op1a_3^0 op1a_3^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_3^0 op2a_3^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post))))
    (cfg_trans2 pc^0 l6 pc^post l3 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= hda_1^0 hda_1^post) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_1^0 op1a_1^post)) (= op1a_2^0 op1a_2^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l3 pc^post l4 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (<= 1 (+ 0 op2a_1^0)) (<= 1 (+ 0 hda_1^0))) (= op1a_2^post (+ (+ 0 op1a_1^0) op1a_2^0))) (= op2b_2^post (+ (+ -1 op2a_1^0) op2b_2^0))) (= hdb_2^post (+ (+ -1 hda_1^0) hdb_2^0))) (= hdc_2^post (+ 1 hdc_2^0))) (= op1a_1^post 0)) (= op2a_1^post 0)) (= hda_1^post 0)) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l3 pc^post l1 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= op1a_0^post (+ (+ 0 op1a_0^0) op1a_1^0)) (= op1a_1^post 0)) (= hda_1^0 hda_1^post)) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_2^0 op1a_2^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l1 pc^post l3 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (<= 1 (+ 0 op1a_0^0)) (= op1a_1^post (+ (+ -1 op1a_0^0) op1a_1^0))) (= op1a_0^post 0)) (= op2a_1^post (+ 1 op2a_1^0))) (= hda_1^post (+ 1 hda_1^0))) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_2^0 op1a_2^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
    (cfg_trans2 pc^0 l7 pc^post l0 (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (and (= hda_1^0 hda_1^post) (= hda_3^0 hda_3^post)) (= hda_4^0 hda_4^post)) (= hdb_2^0 hdb_2^post)) (= hdb_3^0 hdb_3^post)) (= hdb_5^0 hdb_5^post)) (= hdc_2^0 hdc_2^post)) (= hdc_3^0 hdc_3^post)) (= hdc_5^0 hdc_5^post)) (= hdd_4^0 hdd_4^post)) (= hde_5^0 hde_5^post)) (= hdf_5^0 hdf_5^post)) (= hdg_5^0 hdg_5^post)) (= op1a_0^0 op1a_0^post)) (= op1a_1^0 op1a_1^post)) (= op1a_2^0 op1a_2^post)) (= op1a_3^0 op1a_3^post)) (= op1a_4^0 op1a_4^post)) (= op1a_5^0 op1a_5^post)) (= op1b_5^0 op1b_5^post)) (= op2a_1^0 op2a_1^post)) (= op2a_3^0 op2a_3^post)) (= op2a_4^0 op2a_4^post)) (= op2b_2^0 op2b_2^post)) (= op2b_3^0 op2b_3^post)) (= op2b_5^0 op2b_5^post)) (= op2c_4^0 op2c_4^post)) (= op2d_5^0 op2d_5^post)) (= t5^0 t5^post)))
  )
)
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