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TRS Stand 20472 pair #381712405
details
property
value
status
complete
benchmark
otto05.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n086.star.cs.uiowa.edu
space
AProVE_07
run statistics
property
value
solver
muterm 5.18
configuration
default
runtime (wallclock)
0.106840133667 seconds
cpu usage
0.079027833
max memory
4124672.0
stage attributes
key
value
output-size
6554
starexec-result
YES
output
/export/starexec/sandbox2/solver/bin/starexec_run_default /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR x y) (RULES half(0) -> 0 half(s(0)) -> 0 half(s(s(x))) -> s(half(x)) help(x,y) -> ifb(lt(y,x),x,y) ifa(false,x) -> logZeroError ifa(true,x) -> help(x,1) ifb(false,x,y) -> y ifb(true,x,y) -> help(half(x),s(y)) logarithm(x) -> ifa(lt(0,x),x) lt(0,s(x)) -> true lt(s(x),s(y)) -> lt(x,y) lt(x,0) -> false ) Problem 1: Innermost Equivalent Processor: -> Rules: half(0) -> 0 half(s(0)) -> 0 half(s(s(x))) -> s(half(x)) help(x,y) -> ifb(lt(y,x),x,y) ifa(false,x) -> logZeroError ifa(true,x) -> help(x,1) ifb(false,x,y) -> y ifb(true,x,y) -> help(half(x),s(y)) logarithm(x) -> ifa(lt(0,x),x) lt(0,s(x)) -> true lt(s(x),s(y)) -> lt(x,y) lt(x,0) -> false -> The term rewriting system is non-overlaping or locally confluent overlay system. Therefore, innermost termination implies termination. Problem 1: Dependency Pairs Processor: -> Pairs: HALF(s(s(x))) -> HALF(x) HELP(x,y) -> IFB(lt(y,x),x,y) HELP(x,y) -> LT(y,x) IFA(true,x) -> HELP(x,1) IFB(true,x,y) -> HALF(x) IFB(true,x,y) -> HELP(half(x),s(y)) LOGARITHM(x) -> IFA(lt(0,x),x) LOGARITHM(x) -> LT(0,x) LT(s(x),s(y)) -> LT(x,y) -> Rules: half(0) -> 0 half(s(0)) -> 0 half(s(s(x))) -> s(half(x)) help(x,y) -> ifb(lt(y,x),x,y) ifa(false,x) -> logZeroError ifa(true,x) -> help(x,1) ifb(false,x,y) -> y ifb(true,x,y) -> help(half(x),s(y)) logarithm(x) -> ifa(lt(0,x),x) lt(0,s(x)) -> true lt(s(x),s(y)) -> lt(x,y) lt(x,0) -> false Problem 1: SCC Processor: -> Pairs: HALF(s(s(x))) -> HALF(x) HELP(x,y) -> IFB(lt(y,x),x,y) HELP(x,y) -> LT(y,x) IFA(true,x) -> HELP(x,1) IFB(true,x,y) -> HALF(x) IFB(true,x,y) -> HELP(half(x),s(y)) LOGARITHM(x) -> IFA(lt(0,x),x) LOGARITHM(x) -> LT(0,x) LT(s(x),s(y)) -> LT(x,y) -> Rules: half(0) -> 0 half(s(0)) -> 0 half(s(s(x))) -> s(half(x)) help(x,y) -> ifb(lt(y,x),x,y) ifa(false,x) -> logZeroError ifa(true,x) -> help(x,1) ifb(false,x,y) -> y ifb(true,x,y) -> help(half(x),s(y)) logarithm(x) -> ifa(lt(0,x),x) lt(0,s(x)) -> true lt(s(x),s(y)) -> lt(x,y) lt(x,0) -> false ->Strongly Connected Components: ->->Cycle:
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