details

property	value
status	complete
benchmark	#3.13.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n086.star.cs.uiowa.edu
space	AG01

run statistics

property	value
solver	muterm 5.18
configuration	default
runtime (wallclock)	0.152104139328 seconds
cpu usage	0.081580465
max memory	4870144.0

stage attributes

key	value
output-size	13833
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_default /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR h i u v x y) (RULES eq(0,0) -> true eq(0,s(x)) -> false eq(s(x),0) -> false eq(s(x),s(y)) -> eq(x,y) if_reach_1(false,x,y,edge(u,v,i),h) -> reach(x,y,i,edge(u,v,h)) if_reach_1(true,x,y,edge(u,v,i),h) -> if_reach_2(eq(y,v),x,y,edge(u,v,i),h) if_reach_2(false,x,y,edge(u,v,i),h) -> or(reach(x,y,i,h),reach(v,y,union(i,h),empty)) if_reach_2(true,x,y,edge(u,v,i),h) -> true or(false,y) -> y or(true,y) -> true reach(x,y,edge(u,v,i),h) -> if_reach_1(eq(x,u),x,y,edge(u,v,i),h) reach(x,y,empty,h) -> false union(edge(x,y,i),h) -> edge(x,y,union(i,h)) union(empty,h) -> h ) Problem 1: Innermost Equivalent Processor: -> Rules: eq(0,0) -> true eq(0,s(x)) -> false eq(s(x),0) -> false eq(s(x),s(y)) -> eq(x,y) if_reach_1(false,x,y,edge(u,v,i),h) -> reach(x,y,i,edge(u,v,h)) if_reach_1(true,x,y,edge(u,v,i),h) -> if_reach_2(eq(y,v),x,y,edge(u,v,i),h) if_reach_2(false,x,y,edge(u,v,i),h) -> or(reach(x,y,i,h),reach(v,y,union(i,h),empty)) if_reach_2(true,x,y,edge(u,v,i),h) -> true or(false,y) -> y or(true,y) -> true reach(x,y,edge(u,v,i),h) -> if_reach_1(eq(x,u),x,y,edge(u,v,i),h) reach(x,y,empty,h) -> false union(edge(x,y,i),h) -> edge(x,y,union(i,h)) union(empty,h) -> h -> The term rewriting system is non-overlaping or locally confluent overlay system. Therefore, innermost termination implies termination. Problem 1: Dependency Pairs Processor: -> Pairs: EQ(s(x),s(y)) -> EQ(x,y) IF_REACH_1(false,x,y,edge(u,v,i),h) -> REACH(x,y,i,edge(u,v,h)) IF_REACH_1(true,x,y,edge(u,v,i),h) -> EQ(y,v) IF_REACH_1(true,x,y,edge(u,v,i),h) -> IF_REACH_2(eq(y,v),x,y,edge(u,v,i),h) IF_REACH_2(false,x,y,edge(u,v,i),h) -> OR(reach(x,y,i,h),reach(v,y,union(i,h),empty)) IF_REACH_2(false,x,y,edge(u,v,i),h) -> REACH(v,y,union(i,h),empty) IF_REACH_2(false,x,y,edge(u,v,i),h) -> REACH(x,y,i,h) IF_REACH_2(false,x,y,edge(u,v,i),h) -> UNION(i,h) REACH(x,y,edge(u,v,i),h) -> EQ(x,u) REACH(x,y,edge(u,v,i),h) -> IF_REACH_1(eq(x,u),x,y,edge(u,v,i),h) UNION(edge(x,y,i),h) -> UNION(i,h) -> Rules: eq(0,0) -> true eq(0,s(x)) -> false eq(s(x),0) -> false eq(s(x),s(y)) -> eq(x,y) if_reach_1(false,x,y,edge(u,v,i),h) -> reach(x,y,i,edge(u,v,h)) if_reach_1(true,x,y,edge(u,v,i),h) -> if_reach_2(eq(y,v),x,y,edge(u,v,i),h) if_reach_2(false,x,y,edge(u,v,i),h) -> or(reach(x,y,i,h),reach(v,y,union(i,h),empty)) if_reach_2(true,x,y,edge(u,v,i),h) -> true or(false,y) -> y or(true,y) -> true reach(x,y,edge(u,v,i),h) -> if_reach_1(eq(x,u),x,y,edge(u,v,i),h) reach(x,y,empty,h) -> false union(edge(x,y,i),h) -> edge(x,y,union(i,h)) union(empty,h) -> h Problem 1: SCC Processor: -> Pairs: EQ(s(x),s(y)) -> EQ(x,y) IF_REACH_1(false,x,y,edge(u,v,i),h) -> REACH(x,y,i,edge(u,v,h)) IF_REACH_1(true,x,y,edge(u,v,i),h) -> EQ(y,v) IF_REACH_1(true,x,y,edge(u,v,i),h) -> IF_REACH_2(eq(y,v),x,y,edge(u,v,i),h) IF_REACH_2(false,x,y,edge(u,v,i),h) -> OR(reach(x,y,i,h),reach(v,y,union(i,h),empty)) IF_REACH_2(false,x,y,edge(u,v,i),h) -> REACH(v,y,union(i,h),empty) IF_REACH_2(false,x,y,edge(u,v,i),h) -> REACH(x,y,i,h) IF_REACH_2(false,x,y,edge(u,v,i),h) -> UNION(i,h) REACH(x,y,edge(u,v,i),h) -> EQ(x,u) REACH(x,y,edge(u,v,i),h) -> IF_REACH_1(eq(x,u),x,y,edge(u,v,i),h) UNION(edge(x,y,i),h) -> UNION(i,h) -> Rules: eq(0,0) -> true eq(0,s(x)) -> false eq(s(x),0) -> false eq(s(x),s(y)) -> eq(x,y) popout

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