details

property	value
status	complete
benchmark	Ex3_3_25_Bor03_L.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n024.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.54276490211 seconds
cpu usage	3.389780371
max memory	2.21274112E8

stage attributes

key	value
output-size	1833
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_standard /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.xml # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRSRRRProof [EQUIVALENT, 0 ms] (2) QTRS (3) RisEmptyProof [EQUIVALENT, 0 ms] (4) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: app(nil, YS) -> YS app(cons(X), YS) -> cons(X) from(X) -> cons(X) zWadr(nil, YS) -> nil zWadr(XS, nil) -> nil zWadr(cons(X), cons(Y)) -> cons(app(Y, cons(X))) prefix(L) -> cons(nil) Q is empty. ---------------------------------------- (1) QTRSRRRProof (EQUIVALENT) Used ordering: Knuth-Bendix order [KBO] with precedence:nil > zWadr_2 > from_1 > prefix_1 > cons_1 > app_2 and weight map: nil=2 cons_1=1 from_1=1 prefix_1=2 app_2=0 zWadr_2=0 The variable weight is 1With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: app(nil, YS) -> YS app(cons(X), YS) -> cons(X) from(X) -> cons(X) zWadr(nil, YS) -> nil zWadr(XS, nil) -> nil zWadr(cons(X), cons(Y)) -> cons(app(Y, cons(X))) prefix(L) -> cons(nil) ---------------------------------------- (2) Obligation: Q restricted rewrite system: R is empty. Q is empty. ---------------------------------------- (3) RisEmptyProof (EQUIVALENT) The TRS R is empty. Hence, termination is trivially proven. ---------------------------------------- (4) YES popout

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job log

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actions

all output return to TRS Stand 20472