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TRS Stand 20472 pair #381715811
details
property
value
status
complete
benchmark
MYNAT_nosorts-noand_FR.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n070.star.cs.uiowa.edu
space
Transformed_CSR_04
run statistics
property
value
solver
muterm 5.18
configuration
default
runtime (wallclock)
0.0529491901398 seconds
cpu usage
0.050229813
max memory
3657728.0
stage attributes
key
value
output-size
6564
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR M N X) (RULES U11(tt,M,N) -> U12(tt,activate(M),activate(N)) U12(tt,M,N) -> s(plus(activate(N),activate(M))) U21(tt,M,N) -> U22(tt,activate(M),activate(N)) U22(tt,M,N) -> plus(x(activate(N),activate(M)),activate(N)) activate(X) -> X plus(N,0) -> N plus(N,s(M)) -> U11(tt,M,N) x(N,0) -> 0 x(N,s(M)) -> U21(tt,M,N) ) Problem 1: Innermost Equivalent Processor: -> Rules: U11(tt,M,N) -> U12(tt,activate(M),activate(N)) U12(tt,M,N) -> s(plus(activate(N),activate(M))) U21(tt,M,N) -> U22(tt,activate(M),activate(N)) U22(tt,M,N) -> plus(x(activate(N),activate(M)),activate(N)) activate(X) -> X plus(N,0) -> N plus(N,s(M)) -> U11(tt,M,N) x(N,0) -> 0 x(N,s(M)) -> U21(tt,M,N) -> The term rewriting system is non-overlaping or locally confluent overlay system. Therefore, innermost termination implies termination. Problem 1: Dependency Pairs Processor: -> Pairs: U11#(tt,M,N) -> U12#(tt,activate(M),activate(N)) U11#(tt,M,N) -> ACTIVATE(M) U11#(tt,M,N) -> ACTIVATE(N) U12#(tt,M,N) -> ACTIVATE(M) U12#(tt,M,N) -> ACTIVATE(N) U12#(tt,M,N) -> PLUS(activate(N),activate(M)) U21#(tt,M,N) -> U22#(tt,activate(M),activate(N)) U21#(tt,M,N) -> ACTIVATE(M) U21#(tt,M,N) -> ACTIVATE(N) U22#(tt,M,N) -> ACTIVATE(M) U22#(tt,M,N) -> ACTIVATE(N) U22#(tt,M,N) -> PLUS(x(activate(N),activate(M)),activate(N)) U22#(tt,M,N) -> X(activate(N),activate(M)) PLUS(N,s(M)) -> U11#(tt,M,N) X(N,s(M)) -> U21#(tt,M,N) -> Rules: U11(tt,M,N) -> U12(tt,activate(M),activate(N)) U12(tt,M,N) -> s(plus(activate(N),activate(M))) U21(tt,M,N) -> U22(tt,activate(M),activate(N)) U22(tt,M,N) -> plus(x(activate(N),activate(M)),activate(N)) activate(X) -> X plus(N,0) -> N plus(N,s(M)) -> U11(tt,M,N) x(N,0) -> 0 x(N,s(M)) -> U21(tt,M,N) Problem 1: SCC Processor: -> Pairs: U11#(tt,M,N) -> U12#(tt,activate(M),activate(N)) U11#(tt,M,N) -> ACTIVATE(M) U11#(tt,M,N) -> ACTIVATE(N) U12#(tt,M,N) -> ACTIVATE(M) U12#(tt,M,N) -> ACTIVATE(N) U12#(tt,M,N) -> PLUS(activate(N),activate(M)) U21#(tt,M,N) -> U22#(tt,activate(M),activate(N)) U21#(tt,M,N) -> ACTIVATE(M) U21#(tt,M,N) -> ACTIVATE(N) U22#(tt,M,N) -> ACTIVATE(M) U22#(tt,M,N) -> ACTIVATE(N) U22#(tt,M,N) -> PLUS(x(activate(N),activate(M)),activate(N)) U22#(tt,M,N) -> X(activate(N),activate(M)) PLUS(N,s(M)) -> U11#(tt,M,N) X(N,s(M)) -> U21#(tt,M,N) -> Rules: U11(tt,M,N) -> U12(tt,activate(M),activate(N)) U12(tt,M,N) -> s(plus(activate(N),activate(M))) U21(tt,M,N) -> U22(tt,activate(M),activate(N)) U22(tt,M,N) -> plus(x(activate(N),activate(M)),activate(N)) activate(X) -> X plus(N,0) -> N plus(N,s(M)) -> U11(tt,M,N) x(N,0) -> 0 x(N,s(M)) -> U21(tt,M,N) ->Strongly Connected Components: ->->Cycle:
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