SRS Stand 10685 pair #381723057

details

property	value
status	complete
benchmark	size-12-alpha-3-num-51.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n024.star.cs.uiowa.edu
space	Waldmann_07_size12

run statistics

property	value
solver	ttt2-1.17+nonreach
configuration	ttt2-1.17+nonreach
runtime (wallclock)	11.1204469204 seconds
cpu usage	41.998650269
max memory	6.27060736E8

stage attributes

key	value
output-size	18714
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_ttt2-1.17+nonreach /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files


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YES

Problem:
 a(x1) -> x1
 a(a(x1)) -> a(b(x1))
 b(x1) -> x1
 c(b(x1)) -> a(b(c(c(x1))))

Proof:
 DP Processor:
  DPs:
   a#(a(x1)) -> b#(x1)
   a#(a(x1)) -> a#(b(x1))
   c#(b(x1)) -> c#(x1)
   c#(b(x1)) -> c#(c(x1))
   c#(b(x1)) -> b#(c(c(x1)))
   c#(b(x1)) -> a#(b(c(c(x1))))
  TRS:
   a(x1) -> x1
   a(a(x1)) -> a(b(x1))
   b(x1) -> x1
   c(b(x1)) -> a(b(c(c(x1))))
  TDG Processor:
   DPs:
    a#(a(x1)) -> b#(x1)
    a#(a(x1)) -> a#(b(x1))
    c#(b(x1)) -> c#(x1)
    c#(b(x1)) -> c#(c(x1))
    c#(b(x1)) -> b#(c(c(x1)))
    c#(b(x1)) -> a#(b(c(c(x1))))
   TRS:
    a(x1) -> x1
    a(a(x1)) -> a(b(x1))
    b(x1) -> x1
    c(b(x1)) -> a(b(c(c(x1))))
   graph:
    c#(b(x1)) -> c#(c(x1)) -> c#(b(x1)) -> a#(b(c(c(x1))))
    c#(b(x1)) -> c#(c(x1)) -> c#(b(x1)) -> b#(c(c(x1)))
    c#(b(x1)) -> c#(c(x1)) -> c#(b(x1)) -> c#(c(x1))
    c#(b(x1)) -> c#(c(x1)) -> c#(b(x1)) -> c#(x1)
    c#(b(x1)) -> c#(x1) -> c#(b(x1)) -> a#(b(c(c(x1))))
    c#(b(x1)) -> c#(x1) -> c#(b(x1)) -> b#(c(c(x1)))
    c#(b(x1)) -> c#(x1) -> c#(b(x1)) -> c#(c(x1))
    c#(b(x1)) -> c#(x1) -> c#(b(x1)) -> c#(x1)
    c#(b(x1)) -> a#(b(c(c(x1)))) -> a#(a(x1)) -> a#(b(x1))
    c#(b(x1)) -> a#(b(c(c(x1)))) -> a#(a(x1)) -> b#(x1)
    a#(a(x1)) -> a#(b(x1)) -> a#(a(x1)) -> a#(b(x1))
    a#(a(x1)) -> a#(b(x1)) -> a#(a(x1)) -> b#(x1)
   SCC Processor:
    #sccs: 2
    #rules: 3
    #arcs: 12/36
    DPs:
     c#(b(x1)) -> c#(c(x1))
     c#(b(x1)) -> c#(x1)
    TRS:
     a(x1) -> x1
     a(a(x1)) -> a(b(x1))
     b(x1) -> x1
     c(b(x1)) -> a(b(c(c(x1))))
    Root-Labeling Processor:
     DPs:
      c{#,(f6)}(f6(b)(b(f6)(x1))) -> c{#,(f6)}(f6(c)(c(f6)(x1)))
      c{#,(f6)}(f6(b)(b(a)(x1))) -> c{#,(f6)}(f6(c)(c(a)(x1)))
      c{#,(f6)}(f6(b)(b(b)(x1))) -> c{#,(f6)}(f6(c)(c(b)(x1)))
      c{#,(f6)}(f6(b)(b(c)(x1))) -> c{#,(f6)}(f6(c)(c(c)(x1)))
      c{#,(f6)}(f6(b)(b(f6)(x1))) -> c{#,(f6)}(f6(f6)(x1))
      c{#,(f6)}(f6(b)(b(a)(x1))) -> c{#,(f6)}(f6(a)(x1))
      c{#,(f6)}(f6(b)(b(b)(x1))) -> c{#,(f6)}(f6(b)(x1))
      c{#,(f6)}(f6(b)(b(c)(x1))) -> c{#,(f6)}(f6(c)(x1))
     TRS:
      f6(a)(a(f6)(x1)) -> f6(f6)(x1)
      f6(a)(a(a)(x1)) -> f6(a)(x1)
      f6(a)(a(b)(x1)) -> f6(b)(x1)
      f6(a)(a(c)(x1)) -> f6(c)(x1)
      a(a)(a(f6)(x1)) -> a(f6)(x1)
      a(a)(a(a)(x1)) -> a(a)(x1)
      a(a)(a(b)(x1)) -> a(b)(x1)
      a(a)(a(c)(x1)) -> a(c)(x1)
      b(a)(a(f6)(x1)) -> b(f6)(x1)
      b(a)(a(a)(x1)) -> b(a)(x1)
      b(a)(a(b)(x1)) -> b(b)(x1)
      b(a)(a(c)(x1)) -> b(c)(x1)
      c(a)(a(f6)(x1)) -> c(f6)(x1)
      c(a)(a(a)(x1)) -> c(a)(x1)
      c(a)(a(b)(x1)) -> c(b)(x1)
      c(a)(a(c)(x1)) -> c(c)(x1)
      a(a)(a(f6)(x1)) -> a(b)(b(f6)(x1))
      a(a)(a(a)(x1)) -> a(b)(b(a)(x1))
      a(a)(a(b)(x1)) -> a(b)(b(b)(x1))
      a(a)(a(c)(x1)) -> a(b)(b(c)(x1))
      f6(b)(b(f6)(x1)) -> f6(f6)(x1)
      f6(b)(b(a)(x1)) -> f6(a)(x1)
      f6(b)(b(b)(x1)) -> f6(b)(x1)

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job log

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