TRS Stand certi 70678 pair #381726569

loading
details
property value
status complete
benchmark t002.xml
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
execution host n025.star.cs.uiowa.edu
space HirokawaMiddeldorp_04
run statistics
property value
solver ttt2-1.17+nonreach
configuration ttt2-1.17+nonreach-cert
runtime (wallclock) 7.3368268013 seconds
cpu usage 13.492870746
max memory 4.4566528E8
stage attributes
key value
starexec-result MAYBE
loading output popout

output may be truncated. 'popout' for the full output.

loading job log

	
				popout
			
actions all output return to TRS Stand certi 70678