details

property	value
status	complete
benchmark	MYNAT_complete-noand-peanoSimple.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n006.star.cs.uiowa.edu
space	Maude_06

run statistics

property	value
solver	muterm 5.18
configuration	default
runtime (wallclock)	0.0990948677063 seconds
cpu usage	0.096873329
max memory	6479872.0

stage attributes

key	value
output-size	20679
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_default /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR M N V1 V2) (STRATEGY CONTEXTSENSITIVE (U11 1) (U12 1) (U13 1) (U14 1) (U15 1) (U16 1) (U21 1) (U22 1) (U23 1) (U31 1) (U32 1) (U41 1) (U51 1) (U52 1) (U61 1) (U62 1) (U63 1) (U64 1) (isNat) (isNatKind) (plus 1 2) (0) (s 1) (tt) ) (RULES U11(tt,V1,V2) -> U12(isNatKind(V1),V1,V2) U12(tt,V1,V2) -> U13(isNatKind(V2),V1,V2) U13(tt,V1,V2) -> U14(isNatKind(V2),V1,V2) U14(tt,V1,V2) -> U15(isNat(V1),V2) U15(tt,V2) -> U16(isNat(V2)) U16(tt) -> tt U21(tt,V1) -> U22(isNatKind(V1),V1) U22(tt,V1) -> U23(isNat(V1)) U23(tt) -> tt U31(tt,V2) -> U32(isNatKind(V2)) U32(tt) -> tt U41(tt) -> tt U51(tt,N) -> U52(isNatKind(N),N) U52(tt,N) -> N U61(tt,M,N) -> U62(isNatKind(M),M,N) U62(tt,M,N) -> U63(isNat(N),M,N) U63(tt,M,N) -> U64(isNatKind(N),M,N) U64(tt,M,N) -> s(plus(N,M)) isNat(plus(V1,V2)) -> U11(isNatKind(V1),V1,V2) isNat(0) -> tt isNat(s(V1)) -> U21(isNatKind(V1),V1) isNatKind(plus(V1,V2)) -> U31(isNatKind(V1),V2) isNatKind(0) -> tt isNatKind(s(V1)) -> U41(isNatKind(V1)) plus(N,0) -> U51(isNat(N),N) plus(N,s(M)) -> U61(isNat(M),M,N) ) Problem 1: Dependency Pairs Processor: -> Pairs: U11#(tt,V1,V2) -> U12#(isNatKind(V1),V1,V2) U11#(tt,V1,V2) -> ISNATKIND(V1) U12#(tt,V1,V2) -> U13#(isNatKind(V2),V1,V2) U12#(tt,V1,V2) -> ISNATKIND(V2) U13#(tt,V1,V2) -> U14#(isNatKind(V2),V1,V2) U13#(tt,V1,V2) -> ISNATKIND(V2) U14#(tt,V1,V2) -> U15#(isNat(V1),V2) U14#(tt,V1,V2) -> ISNAT(V1) U15#(tt,V2) -> U16#(isNat(V2)) U15#(tt,V2) -> ISNAT(V2) U21#(tt,V1) -> U22#(isNatKind(V1),V1) U21#(tt,V1) -> ISNATKIND(V1) U22#(tt,V1) -> U23#(isNat(V1)) U22#(tt,V1) -> ISNAT(V1) U31#(tt,V2) -> U32#(isNatKind(V2)) U31#(tt,V2) -> ISNATKIND(V2) U51#(tt,N) -> U52#(isNatKind(N),N) U51#(tt,N) -> ISNATKIND(N) U52#(tt,N) -> N U61#(tt,M,N) -> U62#(isNatKind(M),M,N) U61#(tt,M,N) -> ISNATKIND(M) U62#(tt,M,N) -> U63#(isNat(N),M,N) U62#(tt,M,N) -> ISNAT(N) U63#(tt,M,N) -> U64#(isNatKind(N),M,N) U63#(tt,M,N) -> ISNATKIND(N) U64#(tt,M,N) -> PLUS(N,M) U64#(tt,M,N) -> M U64#(tt,M,N) -> N ISNAT(plus(V1,V2)) -> U11#(isNatKind(V1),V1,V2) ISNAT(plus(V1,V2)) -> ISNATKIND(V1) popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Conte Sensi 17651