details

property	value
status	complete
benchmark	MYNAT_nosorts_noand_GM.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n079.star.cs.uiowa.edu
space	Transformed_CSR_innermost_04

run statistics

property	value
solver	muterm 5.18
configuration	default
runtime (wallclock)	69.8065550327 seconds
cpu usage	58.820400352
max memory	2.4076288E7

stage attributes

key	value
output-size	64728
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR M N X X1 X2 X3) (RULES a__U11(tt,M,N) -> a__U12(tt,M,N) a__U11(X1,X2,X3) -> U11(X1,X2,X3) a__U12(tt,M,N) -> s(a__plus(mark(N),mark(M))) a__U12(X1,X2,X3) -> U12(X1,X2,X3) a__U21(tt,M,N) -> a__U22(tt,M,N) a__U21(X1,X2,X3) -> U21(X1,X2,X3) a__U22(tt,M,N) -> a__plus(a__x(mark(N),mark(M)),mark(N)) a__U22(X1,X2,X3) -> U22(X1,X2,X3) a__plus(N,0) -> mark(N) a__plus(N,s(M)) -> a__U11(tt,M,N) a__plus(X1,X2) -> plus(X1,X2) a__x(N,0) -> 0 a__x(N,s(M)) -> a__U21(tt,M,N) a__x(X1,X2) -> x(X1,X2) mark(0) -> 0 mark(U11(X1,X2,X3)) -> a__U11(mark(X1),X2,X3) mark(U12(X1,X2,X3)) -> a__U12(mark(X1),X2,X3) mark(U21(X1,X2,X3)) -> a__U21(mark(X1),X2,X3) mark(U22(X1,X2,X3)) -> a__U22(mark(X1),X2,X3) mark(plus(X1,X2)) -> a__plus(mark(X1),mark(X2)) mark(s(X)) -> s(mark(X)) mark(tt) -> tt mark(x(X1,X2)) -> a__x(mark(X1),mark(X2)) ) (STRATEGY INNERMOST) Problem 1: Dependency Pairs Processor: -> Pairs: A__U11(tt,M,N) -> A__U12(tt,M,N) A__U12(tt,M,N) -> A__PLUS(mark(N),mark(M)) A__U12(tt,M,N) -> MARK(M) A__U12(tt,M,N) -> MARK(N) A__U21(tt,M,N) -> A__U22(tt,M,N) A__U22(tt,M,N) -> A__PLUS(a__x(mark(N),mark(M)),mark(N)) A__U22(tt,M,N) -> A__X(mark(N),mark(M)) A__U22(tt,M,N) -> MARK(M) A__U22(tt,M,N) -> MARK(N) A__PLUS(N,0) -> MARK(N) A__PLUS(N,s(M)) -> A__U11(tt,M,N) A__X(N,s(M)) -> A__U21(tt,M,N) MARK(U11(X1,X2,X3)) -> A__U11(mark(X1),X2,X3) MARK(U11(X1,X2,X3)) -> MARK(X1) MARK(U12(X1,X2,X3)) -> A__U12(mark(X1),X2,X3) MARK(U12(X1,X2,X3)) -> MARK(X1) MARK(U21(X1,X2,X3)) -> A__U21(mark(X1),X2,X3) MARK(U21(X1,X2,X3)) -> MARK(X1) MARK(U22(X1,X2,X3)) -> A__U22(mark(X1),X2,X3) MARK(U22(X1,X2,X3)) -> MARK(X1) MARK(plus(X1,X2)) -> A__PLUS(mark(X1),mark(X2)) MARK(plus(X1,X2)) -> MARK(X1) MARK(plus(X1,X2)) -> MARK(X2) MARK(s(X)) -> MARK(X) MARK(x(X1,X2)) -> A__X(mark(X1),mark(X2)) MARK(x(X1,X2)) -> MARK(X1) MARK(x(X1,X2)) -> MARK(X2) -> Rules: a__U11(tt,M,N) -> a__U12(tt,M,N) a__U11(X1,X2,X3) -> U11(X1,X2,X3) a__U12(tt,M,N) -> s(a__plus(mark(N),mark(M))) a__U12(X1,X2,X3) -> U12(X1,X2,X3) a__U21(tt,M,N) -> a__U22(tt,M,N) a__U21(X1,X2,X3) -> U21(X1,X2,X3) a__U22(tt,M,N) -> a__plus(a__x(mark(N),mark(M)),mark(N)) a__U22(X1,X2,X3) -> U22(X1,X2,X3) a__plus(N,0) -> mark(N) a__plus(N,s(M)) -> a__U11(tt,M,N) a__plus(X1,X2) -> plus(X1,X2) a__x(N,0) -> 0 a__x(N,s(M)) -> a__U21(tt,M,N) a__x(X1,X2) -> x(X1,X2) mark(0) -> 0 mark(U11(X1,X2,X3)) -> a__U11(mark(X1),X2,X3) mark(U12(X1,X2,X3)) -> a__U12(mark(X1),X2,X3) mark(U21(X1,X2,X3)) -> a__U21(mark(X1),X2,X3) mark(U22(X1,X2,X3)) -> a__U22(mark(X1),X2,X3) mark(plus(X1,X2)) -> a__plus(mark(X1),mark(X2)) mark(s(X)) -> s(mark(X)) mark(tt) -> tt mark(x(X1,X2)) -> a__x(mark(X1),mark(X2)) Problem 1: SCC Processor: -> Pairs: A__U11(tt,M,N) -> A__U12(tt,M,N) A__U12(tt,M,N) -> A__PLUS(mark(N),mark(M)) popout

output may be truncated. 'popout' for the full output.

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actions

all output return to TRS Inner 89993