details

property	value
status	complete
benchmark	PEANO_complete_GM.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n049.star.cs.uiowa.edu
space	Transformed_CSR_innermost_04

run statistics

property	value
solver	muterm 5.18
configuration	default
runtime (wallclock)	14.1475281715 seconds
cpu usage	13.187751295
max memory	1.3983744E7

stage attributes

key	value
output-size	253677
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR M N V1 V2 X X1 X2 X3) (RULES a__U11(tt,V1,V2) -> a__U12(a__isNat(V1),V2) a__U11(X1,X2,X3) -> U11(X1,X2,X3) a__U12(tt,V2) -> a__U13(a__isNat(V2)) a__U12(X1,X2) -> U12(X1,X2) a__U13(tt) -> tt a__U13(X) -> U13(X) a__U21(tt,V1) -> a__U22(a__isNat(V1)) a__U21(X1,X2) -> U21(X1,X2) a__U22(tt) -> tt a__U22(X) -> U22(X) a__U31(tt,N) -> mark(N) a__U31(X1,X2) -> U31(X1,X2) a__U41(tt,M,N) -> s(a__plus(mark(N),mark(M))) a__U41(X1,X2,X3) -> U41(X1,X2,X3) a__and(tt,X) -> mark(X) a__and(X1,X2) -> and(X1,X2) a__isNat(0) -> tt a__isNat(plus(V1,V2)) -> a__U11(a__and(a__isNatKind(V1),isNatKind(V2)),V1,V2) a__isNat(s(V1)) -> a__U21(a__isNatKind(V1),V1) a__isNat(X) -> isNat(X) a__isNatKind(0) -> tt a__isNatKind(plus(V1,V2)) -> a__and(a__isNatKind(V1),isNatKind(V2)) a__isNatKind(s(V1)) -> a__isNatKind(V1) a__isNatKind(X) -> isNatKind(X) a__plus(N,0) -> a__U31(a__and(a__isNat(N),isNatKind(N)),N) a__plus(N,s(M)) -> a__U41(a__and(a__and(a__isNat(M),isNatKind(M)),and(isNat(N),isNatKind(N))),M,N) a__plus(X1,X2) -> plus(X1,X2) mark(0) -> 0 mark(U11(X1,X2,X3)) -> a__U11(mark(X1),X2,X3) mark(U12(X1,X2)) -> a__U12(mark(X1),X2) mark(U13(X)) -> a__U13(mark(X)) mark(U21(X1,X2)) -> a__U21(mark(X1),X2) mark(U22(X)) -> a__U22(mark(X)) mark(U31(X1,X2)) -> a__U31(mark(X1),X2) mark(U41(X1,X2,X3)) -> a__U41(mark(X1),X2,X3) mark(and(X1,X2)) -> a__and(mark(X1),X2) mark(isNat(X)) -> a__isNat(X) mark(isNatKind(X)) -> a__isNatKind(X) mark(plus(X1,X2)) -> a__plus(mark(X1),mark(X2)) mark(s(X)) -> s(mark(X)) mark(tt) -> tt ) (STRATEGY INNERMOST) Problem 1: Dependency Pairs Processor: -> Pairs: A__U11(tt,V1,V2) -> A__U12(a__isNat(V1),V2) A__U11(tt,V1,V2) -> A__ISNAT(V1) A__U12(tt,V2) -> A__U13(a__isNat(V2)) A__U12(tt,V2) -> A__ISNAT(V2) A__U21(tt,V1) -> A__U22(a__isNat(V1)) A__U21(tt,V1) -> A__ISNAT(V1) A__U31(tt,N) -> MARK(N) A__U41(tt,M,N) -> A__PLUS(mark(N),mark(M)) A__U41(tt,M,N) -> MARK(M) A__U41(tt,M,N) -> MARK(N) A__AND(tt,X) -> MARK(X) A__ISNAT(plus(V1,V2)) -> A__U11(a__and(a__isNatKind(V1),isNatKind(V2)),V1,V2) A__ISNAT(plus(V1,V2)) -> A__AND(a__isNatKind(V1),isNatKind(V2)) A__ISNAT(plus(V1,V2)) -> A__ISNATKIND(V1) A__ISNAT(s(V1)) -> A__U21(a__isNatKind(V1),V1) A__ISNAT(s(V1)) -> A__ISNATKIND(V1) A__ISNATKIND(plus(V1,V2)) -> A__AND(a__isNatKind(V1),isNatKind(V2)) A__ISNATKIND(plus(V1,V2)) -> A__ISNATKIND(V1) A__ISNATKIND(s(V1)) -> A__ISNATKIND(V1) A__PLUS(N,0) -> A__U31(a__and(a__isNat(N),isNatKind(N)),N) A__PLUS(N,0) -> A__AND(a__isNat(N),isNatKind(N)) A__PLUS(N,0) -> A__ISNAT(N) A__PLUS(N,s(M)) -> A__U41(a__and(a__and(a__isNat(M),isNatKind(M)),and(isNat(N),isNatKind(N))),M,N) A__PLUS(N,s(M)) -> A__AND(a__and(a__isNat(M),isNatKind(M)),and(isNat(N),isNatKind(N))) A__PLUS(N,s(M)) -> A__AND(a__isNat(M),isNatKind(M)) A__PLUS(N,s(M)) -> A__ISNAT(M) MARK(U11(X1,X2,X3)) -> A__U11(mark(X1),X2,X3) MARK(U11(X1,X2,X3)) -> MARK(X1) MARK(U12(X1,X2)) -> A__U12(mark(X1),X2) MARK(U12(X1,X2)) -> MARK(X1) MARK(U13(X)) -> A__U13(mark(X)) MARK(U13(X)) -> MARK(X) MARK(U21(X1,X2)) -> A__U21(mark(X1),X2) MARK(U21(X1,X2)) -> MARK(X1) MARK(U22(X)) -> A__U22(mark(X)) MARK(U22(X)) -> MARK(X) MARK(U31(X1,X2)) -> A__U31(mark(X1),X2) MARK(U31(X1,X2)) -> MARK(X1) MARK(U41(X1,X2,X3)) -> A__U41(mark(X1),X2,X3) MARK(U41(X1,X2,X3)) -> MARK(X1) popout

output may be truncated. 'popout' for the full output.

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actions

all output return to TRS Inner 89993