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Integ Trans Syste 27634 pair #381736930
details
property
value
status
complete
benchmark
Overflow.jar-obl-8.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n111.star.cs.uiowa.edu
space
From_AProVE_2014
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0260062217712 seconds
cpu usage
0.022159534
max memory
3964928.0
stage attributes
key
value
output-size
2451
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l3, true> <l1, l2, (arg2 > ~(1)) /\ (undef1 > ~(1)) /\ (arg1 > 0), par{arg1 -> undef1, arg2 -> undef2}> <l2, l2, (arg1 < 2147483648), par{arg1 -> (arg1 + 1), arg2 -> undef4}> <l3, l1, true, par{arg1 -> undef5, arg2 -> undef6}> Fresh variables: undef1, undef2, undef4, undef5, undef6, Undef variables: undef1, undef2, undef4, undef5, undef6, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, (arg1 = undef1) /\ (undef6 > ~(1)) /\ (undef1 > ~(1)) /\ (undef5 > 0)> <l2, l2, (arg1 < 2147483648), par{arg1 -> (arg1 + 1)}> Fresh variables: undef1, undef2, undef4, undef5, undef6, Undef variables: undef1, undef2, undef4, undef5, undef6, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l2, l2, arg1 <= 2147483647, {arg1 -> 1 + arg1, rest remain the same}> Variables: arg1 Precedence: Graph 0 Graph 1 <l0, l2, 1 <= undef5 /\ 0 <= undef1 /\ 0 <= undef6 /\ arg1 = undef1, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.001585 Checking conditional termination of SCC {l2}... LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.000541s �[33mRanking function: �[36m2147483647 - arg1�[0m New Graphs: �[32mProgram Terminates�[0m
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