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Integ Trans Syste 27634 pair #381736942
details
property
value
status
complete
benchmark
sum_rec.jar-obl-8.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n053.star.cs.uiowa.edu
space
From_AProVE_2014
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
13.470649004 seconds
cpu usage
23.749545268
max memory
5.1509248E8
stage attributes
key
value
output-size
4374
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l3, true> <l1, l2, true, par{arg1 -> ~(1)}> <l2, l2, (arg1 < 0) /\ ((arg1 - 1) < arg1), par{arg1 -> (arg1 - 1)}> <l2, l2, (arg1 > 0) /\ ((arg1 - 1) < arg1), par{arg1 -> (arg1 - 1)}> <l3, l1, true, par{arg1 -> undef4}> Fresh variables: undef4, Undef variables: undef4, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, (arg1 = ~(1))> <l2, l2, (arg1 < 0) /\ ((arg1 - 1) < arg1), par{arg1 -> (arg1 - 1)}> <l2, l2, (arg1 > 0) /\ ((arg1 - 1) < arg1), par{arg1 -> (arg1 - 1)}> Fresh variables: undef4, Undef variables: undef4, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l2, l2, 1 + arg1 <= 0, {arg1 -> -1 + arg1, rest remain the same}> <l2, l2, 1 <= arg1, {arg1 -> -1 + arg1, rest remain the same}> Variables: arg1 Precedence: Graph 0 Graph 1 <l0, l2, 1 + arg1 = 0, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.002888 �[33mSome transition disabled by a set of invariant(s):�[0m �[36mInvariant at l2: 1 + arg1 <= 0�[0m �[33mStrengthening and disabling transitions...�[0m > It's unfeasible. Removing transition: <l2, l2, 1 <= arg1, {arg1 -> -1 + arg1, rest remain the same}> LOG: CALL solverLinear in Graph for feasibility LOG: RETURN solveLinear in Graph for feasibility
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