Integ Trans Syste 27634 pair #381737042

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status complete
benchmark Velroyen08-moduloLower.jar-obl-8.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
execution host n057.star.cs.uiowa.edu
space From_AProVE_2014
run statistics
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solver Ctrl
configuration Transition
runtime (wallclock) 1.86515402794 seconds
cpu usage 1.968990649
max memory 1.7625088E7
stage attributes
key value
output-size 3792
starexec-result MAYBE
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