details

property	value
status	complete
benchmark	st88b-fail.t2.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n096.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp17
runtime (wallclock)	8.84729290009 seconds
cpu usage	20.119127457
max memory	2.69062144E8

stage attributes

key	value
output-size	7799
starexec-result	NO

output

/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l14, true> <l1, l2, true> <l2, l3, (undef6 = undef6), par{___rho_2_^0 -> undef6}> <l4, l5, true> <l6, l7, true> <l8, l9, true> <l5, l4, (3 <= (0 + WItemsNum^0)), par{WItemsNum^0 -> (~(1) + WItemsNum^0)}> <l5, l1, ((0 + WItemsNum^0) <= 2)> <l9, l10, true> <l10, l9, true> <l11, l2, (6 <= (0 + WItemsNum^0)), par{WItemsNum^0 -> (1 + WItemsNum^0)}> <l11, l2, ((0 + WItemsNum^0) <= 5), par{WItemsNum^0 -> (1 + WItemsNum^0)}> <l12, l11, ((0 + ___rho_2_^0) <= 0)> <l12, l4, (1 <= (0 + ___rho_2_^0))> <l3, l11, (6 <= (0 + WItemsNum^0))> <l3, l12, ((0 + WItemsNum^0) <= 5)> <l13, l1, (undef49 = undef49) /\ (undef47 = undef47), par{WItemsNum^0 -> (0 + undef47), ___rho_1_^0 -> undef47}> <l14, l13, true> Fresh variables: undef6, undef47, undef49, Undef variables: undef6, undef47, undef49, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, (WItemsNum^0 = (0 + undef47)) /\ (undef49 = undef49) /\ (undef47 = undef47)> <l2, l2, (undef6 = undef6) /\ (6 <= (0 + WItemsNum^0)) /\ (6 <= (0 + WItemsNum^0)), par{WItemsNum^0 -> (1 + WItemsNum^0)}> <l2, l2, (undef6 = undef6) /\ ((0 + WItemsNum^0) <= 5) /\ ((0 + undef6) <= 0) /\ ((0 + WItemsNum^0) <= 5), par{WItemsNum^0 -> (1 + WItemsNum^0)}> <l2, l4, (undef6 = undef6) /\ ((0 + WItemsNum^0) <= 5) /\ (1 <= (0 + undef6))> <l4, l4, (3 <= (0 + WItemsNum^0)), par{WItemsNum^0 -> (~(1) + WItemsNum^0)}> <l4, l2, ((0 + WItemsNum^0) <= 2)> Fresh variables: undef6, undef47, undef49, Undef variables: undef6, undef47, undef49, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l2, l2, 6 <= WItemsNum^0, {WItemsNum^0 -> 1 + WItemsNum^0, rest remain the same}> <l2, l2, undef6 <= 0 /\ WItemsNum^0 <= 5, {WItemsNum^0 -> 1 + WItemsNum^0, rest remain the same}> <l2, l4, 1 <= undef6 /\ WItemsNum^0 <= 5, {all remain the same}> <l4, l4, 3 <= WItemsNum^0, {WItemsNum^0 -> -1 + WItemsNum^0, rest remain the same}> <l4, l2, WItemsNum^0 <= 2, {all remain the same}> Variables: WItemsNum^0 Precedence: Graph 0 Graph 1 <l0, l2, WItemsNum^0 = undef47, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 1 ) popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to Integ Trans Syste 27634