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Integ Trans Syste 27634 pair #381737506
details
property
value
status
complete
benchmark
PastaA1.jar-obl-8.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n070.star.cs.uiowa.edu
space
From_AProVE_2014
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0356471538544 seconds
cpu usage
0.029840933
max memory
4620288.0
stage attributes
key
value
output-size
3046
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l4, true> <l1, l2, (arg2 > ~(1)) /\ (undef1 > ~(1)) /\ (arg1 > 0), par{arg1 -> undef1, arg2 -> undef2}> <l2, l3, (arg1 > 0), par{arg1 -> 0, arg2 -> arg1}> <l3, l2, (arg2 <= arg1), par{arg1 -> (arg2 - 1), arg2 -> undef6}> <l3, l3, (arg2 > arg1), par{arg1 -> (arg1 + 1)}> <l4, l1, true, par{arg1 -> undef9, arg2 -> undef10}> Fresh variables: undef1, undef2, undef6, undef9, undef10, Undef variables: undef1, undef2, undef6, undef9, undef10, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l3, (arg1 = 0) /\ (arg2 = undef1) /\ (undef10 > ~(1)) /\ (undef1 > ~(1)) /\ (undef9 > 0) /\ (undef1 > 0)> <l3, l3, (arg2 <= arg1) /\ ((arg2 - 1) > 0), par{arg1 -> 0, arg2 -> (arg2 - 1)}> <l3, l3, (arg2 > arg1), par{arg1 -> (arg1 + 1)}> Fresh variables: undef1, undef2, undef6, undef9, undef10, Undef variables: undef1, undef2, undef6, undef9, undef10, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l3, l3, arg2 <= arg1 /\ 2 <= arg2, {arg1 -> 0, arg2 -> -1 + arg2, rest remain the same}> <l3, l3, 1 + arg1 <= arg2, {arg1 -> 1 + arg1, rest remain the same}> Variables: arg1, arg2 Precedence: Graph 0 Graph 1 <l0, l3, 1 <= undef1 /\ 1 <= undef9 /\ 0 <= undef10 /\ arg1 = 0 /\ arg2 = undef1, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 3 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.004674 Checking conditional termination of SCC {l3}... LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.001042s �[33mRanking function: �[36m-4 + 2*arg2�[0m New Graphs: Transitions:
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