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Integ Trans Syste 27634 pair #381737572
details
property
value
status
complete
benchmark
MultiLasso.jar-obl-8.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n023.star.cs.uiowa.edu
space
From_AProVE_2014
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
10.3712029457 seconds
cpu usage
25.603633163
max memory
8.20744192E8
stage attributes
key
value
output-size
4424
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l4, true> <l1, l2, (undef4 > ~(1)) /\ (arg2 > 1) /\ (undef5 > ~(1)) /\ (arg1 > 0), par{arg1 -> (undef4 - undef5), arg2 -> undef2, arg3 -> undef3}> <l2, l3, (arg1 > 0), par{arg1 -> (arg1 + 1), arg2 -> (arg1 + 1), arg3 -> (arg1 + 1)}> <l3, l2, (0 = arg2) /\ (0 = arg3), par{arg2 -> undef10, arg3 -> undef11}> <l3, l3, (arg2 > 0) /\ (arg2 = arg3), par{arg2 -> (arg2 - 1), arg3 -> (arg2 - 1)}> <l4, l1, true, par{arg1 -> undef15, arg2 -> undef16, arg3 -> undef17}> Fresh variables: undef2, undef3, undef4, undef5, undef10, undef11, undef15, undef16, undef17, Undef variables: undef2, undef3, undef4, undef5, undef10, undef11, undef15, undef16, undef17, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l3, (arg1 = ((undef4 - undef5) + 1)) /\ (arg2 = ((undef4 - undef5) + 1)) /\ (arg3 = ((undef4 - undef5) + 1)) /\ (undef4 > ~(1)) /\ (undef16 > 1) /\ (undef5 > ~(1)) /\ (undef15 > 0) /\ ((undef4 - undef5) > 0)> <l3, l3, (0 = arg2) /\ (0 = arg3) /\ (arg1 > 0), par{arg1 -> (arg1 + 1), arg2 -> (arg1 + 1), arg3 -> (arg1 + 1)}> <l3, l3, (arg2 > 0) /\ (arg2 = arg3), par{arg2 -> (arg2 - 1), arg3 -> (arg2 - 1)}> Fresh variables: undef2, undef3, undef4, undef5, undef10, undef11, undef15, undef16, undef17, Undef variables: undef2, undef3, undef4, undef5, undef10, undef11, undef15, undef16, undef17, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l3, l3, 1 <= arg1 /\ arg2 = 0 /\ arg3 = 0, {arg1 -> 1 + arg1, arg2 -> 1 + arg1, arg3 -> 1 + arg1, rest remain the same}> <l3, l3, 1 <= arg2 /\ arg2 = arg3, {arg2 -> -1 + arg2, arg3 -> -1 + arg2, rest remain the same}> Variables: arg1, arg2, arg3 Precedence: Graph 0 Graph 1 <l0, l3, 1 + undef5 <= undef4 /\ 1 <= undef15 /\ 0 <= undef4 /\ 0 <= undef5 /\ 2 <= undef16 /\ arg1 + undef5 = 1 + undef4 /\ arg2 + undef5 = 1 + undef4 /\ arg3 + undef5 = 1 + undef4, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 3 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.030369 Checking conditional termination of SCC {l3}... LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.001190s LOG: CALL solveLinear
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