details

property	value
status	complete
benchmark	p-61.t2_fixed.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n022.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp17
runtime (wallclock)	0.0438330173492 seconds
cpu usage	0.039898838
max memory	1.0252288E7

stage attributes

key	value
output-size	3165
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l5, true> <l1, l2, ((10 + (~(1) * x_6^0)) <= 0) /\ (undef3 = 0) /\ (undef2 = (0 + undef3)), par{Result_4^0 -> (0 + undef2), ___cil_tmp4_8^0 -> undef2, ___retres3_7^0 -> undef3}> <l1, l2, (0 <= (9 + (~(1) * x_6^0))) /\ ((~(100) + i_5^0) <= 0) /\ (undef8 = 0) /\ (undef7 = (0 + undef8)), par{Result_4^0 -> (0 + undef7), ___cil_tmp4_8^0 -> undef7, ___retres3_7^0 -> undef8}> <l1, l3, (0 <= (9 + (~(1) * x_6^0))) /\ (0 <= (~(101) + i_5^0)), par{i_5^0 -> (~(1) + i_5^0)}> <l3, l1, true> <l4, l1, true, par{i_5^0 -> 1000}> <l5, l4, true> Fresh variables: undef2, undef3, undef7, undef8, Undef variables: undef2, undef3, undef7, undef8, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l1, (i_5^0 = 1000)> <l1, l2, ((10 + (~(1) * x_6^0)) <= 0) /\ (undef3 = 0) /\ (undef2 = (0 + undef3))> <l1, l2, (0 <= (9 + (~(1) * x_6^0))) /\ ((~(100) + i_5^0) <= 0) /\ (undef8 = 0) /\ (undef7 = (0 + undef8))> <l1, l1, (0 <= (9 + (~(1) * x_6^0))) /\ (0 <= (~(101) + i_5^0)), par{i_5^0 -> (~(1) + i_5^0)}> Fresh variables: undef2, undef3, undef7, undef8, Undef variables: undef2, undef3, undef7, undef8, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, 101 <= i_5^0 /\ x_6^0 <= 9, {i_5^0 -> -1 + i_5^0, rest remain the same}> Variables: i_5^0, x_6^0 Graph 2: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l1, i_5^0 = 1000, {all remain the same}> Graph 2 <l1, l2, 10 <= x_6^0 /\ undef2 = undef3 /\ undef3 = 0, {all remain the same}> <l1, l2, i_5^0 <= 100 /\ x_6^0 <= 9 /\ undef7 = undef8 /\ undef8 = 0, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 1 , 1 ) ( 2 , 2 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... popout

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job log

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actions

all output return to Integ Trans Syste 27634