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Integ Trans Syste 27634 pair #381738070
details
property
value
status
complete
benchmark
MinusUserDefined.jar-obl-8.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n084.star.cs.uiowa.edu
space
From_AProVE_2014
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.108165025711 seconds
cpu usage
0.245750975
max memory
7.6251136E7
stage attributes
key
value
output-size
5362
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l3, true> <l1, l2, (undef2 > ~(1)) /\ (arg2 > ~(1)) /\ (undef1 > ~(1)) /\ (arg1 > 0), par{arg1 -> undef1, arg2 -> undef2, arg3 -> undef1, arg4 -> undef2, arg5 -> undef1}> <l2, l2, (arg3 > 0) /\ (arg4 > 0) /\ (arg3 = arg5), par{arg3 -> (arg3 - 1), arg4 -> (arg4 - 1), arg5 -> (arg3 - 1)}> <l2, l2, (arg3 > 0) /\ (0 = arg4) /\ (arg3 = arg5), par{arg2 -> (arg2 + 1), arg3 -> arg1, arg4 -> (arg2 + 1), arg5 -> arg1}> <l3, l1, true, par{arg1 -> undef16, arg2 -> undef17, arg3 -> undef18, arg4 -> undef19, arg5 -> undef20}> Fresh variables: undef1, undef2, undef16, undef17, undef18, undef19, undef20, Undef variables: undef1, undef2, undef16, undef17, undef18, undef19, undef20, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, (arg1 = undef1) /\ (arg2 = undef2) /\ (arg3 = undef1) /\ (arg4 = undef2) /\ (arg5 = undef1) /\ (undef2 > ~(1)) /\ (undef17 > ~(1)) /\ (undef1 > ~(1)) /\ (undef16 > 0)> <l2, l2, (arg3 > 0) /\ (arg4 > 0) /\ (arg3 = arg5), par{arg3 -> (arg3 - 1), arg4 -> (arg4 - 1), arg5 -> (arg3 - 1)}> <l2, l2, (arg3 > 0) /\ (0 = arg4) /\ (arg3 = arg5), par{arg2 -> (arg2 + 1), arg3 -> arg1, arg4 -> (arg2 + 1), arg5 -> arg1}> Fresh variables: undef1, undef2, undef16, undef17, undef18, undef19, undef20, Undef variables: undef1, undef2, undef16, undef17, undef18, undef19, undef20, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l2, l2, 1 <= arg3 /\ 1 <= arg4 /\ arg3 = arg5, {arg3 -> -1 + arg3, arg4 -> -1 + arg4, arg5 -> -1 + arg3, rest remain the same}> <l2, l2, 1 <= arg3 /\ arg3 = arg5 /\ arg4 = 0, {arg2 -> 1 + arg2, arg3 -> arg1, arg4 -> 1 + arg2, arg5 -> arg1, rest remain the same}> Variables: arg3, arg4, arg5, arg1, arg2 Precedence: Graph 0 Graph 1 <l0, l2, 1 <= undef16 /\ 0 <= undef1 /\ 0 <= undef2 /\ 0 <= undef17 /\ arg1 = undef1 /\ arg2 = undef2 /\ arg3 = undef1 /\ arg4 = undef2 /\ arg5 = undef1, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.009784 Checking conditional termination of SCC {l2}... LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.001464s LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.005469s
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