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Integ Trans Syste 27634 pair #381738123
details
property
value
status
complete
benchmark
dsa_test10.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n071.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0320920944214 seconds
cpu usage
0.028117266
max memory
4218880.0
stage attributes
key
value
output-size
3517
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l7, true> <l1, l2, true> <l3, l4, ((0 + __const_10^0) <= (0 + i911^0))> <l3, l5, ((1 + i911^0) <= (0 + __const_10^0)), par{i911^0 -> (1 + i911^0)}> <l5, l3, true> <l2, l5, ((0 + __const_10^0) <= (0 + i57^0)) /\ (undef30 = undef30), par{i911^0 -> 0, x79^0 -> undef30}> <l2, l1, ((1 + i57^0) <= (0 + __const_10^0)), par{i57^0 -> (1 + i57^0)}> <l6, l1, (undef40 = undef40) /\ (undef41 = undef41), par{i57^0 -> 0, tmp^0 -> undef40, x35^0 -> undef41}> <l7, l6, true> Fresh variables: undef30, undef40, undef41, Undef variables: undef30, undef40, undef41, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l1, (i57^0 = 0) /\ (undef40 = undef40) /\ (undef41 = undef41)> <l1, l5, ((0 + __const_10^0) <= (0 + i57^0)) /\ (undef30 = undef30), par{i911^0 -> 0}> <l1, l1, ((1 + i57^0) <= (0 + __const_10^0)), par{i57^0 -> (1 + i57^0)}> <l5, l4, ((0 + __const_10^0) <= (0 + i911^0))> <l5, l5, ((1 + i911^0) <= (0 + __const_10^0)), par{i911^0 -> (1 + i911^0)}> Fresh variables: undef30, undef40, undef41, Undef variables: undef30, undef40, undef41, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, 1 + i57^0 <= __const_10^0, {i57^0 -> 1 + i57^0, rest remain the same}> Variables: __const_10^0, i57^0 Graph 2: Transitions: <l5, l5, 1 + i911^0 <= __const_10^0, {i911^0 -> 1 + i911^0, rest remain the same}> Variables: __const_10^0, i911^0 Graph 3: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l1, i57^0 = 0, {all remain the same}> Graph 2 <l1, l5, __const_10^0 <= i57^0, {i911^0 -> 0, rest remain the same}> Graph 3 <l5, l4, __const_10^0 <= i911^0, {all remain the same}> Map Locations to Subgraph:
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