details

property	value
status	complete
benchmark	n-6a.t2.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n036.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp17
runtime (wallclock)	4.58206105232 seconds
cpu usage	5.982970028
max memory	3.2083968E8

stage attributes

key	value
output-size	6094
starexec-result	NO

output

/export/starexec/sandbox2/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox2/benchmark/theBenchmark.smt2 /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l7, true> <l1, l2, (((0 + (~(1) * x_5^0)) + y_6^0) <= 0) /\ (undef1 = undef1), par{Result_4^0 -> undef1}> <l1, l3, (0 <= ((~(1) + (~(1) * x_5^0)) + y_6^0)) /\ (undef8 = undef8) /\ ((0 + undef8) <= 0) /\ (0 <= (0 + undef8)), par{tmp_7^0 -> undef8, y_6^0 -> (~(1) + y_6^0)}> <l3, l1, true> <l1, l4, (0 <= ((~(1) + (~(1) * x_5^0)) + y_6^0)) /\ (undef18 = undef18), par{tmp_7^0 -> undef18}> <l4, l5, (undef22 = __disjvr_0^0) /\ (__disjvr_0^0 = undef22), par{__disjvr_0^0 -> undef22}> <l5, l1, true> <l6, l1, true> <l7, l6, true> Fresh variables: undef1, undef8, undef18, undef22, Undef variables: undef1, undef8, undef18, undef22, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l1, true> <l1, l2, (((0 + (~(1) * x_5^0)) + y_6^0) <= 0) /\ (undef1 = undef1)> <l1, l1, (0 <= ((~(1) + (~(1) * x_5^0)) + y_6^0)) /\ (undef8 = undef8) /\ ((0 + undef8) <= 0) /\ (0 <= (0 + undef8)), par{y_6^0 -> (~(1) + y_6^0)}> <l1, l1, (0 <= ((~(1) + (~(1) * x_5^0)) + y_6^0)) /\ (undef18 = undef18) /\ (undef22 = __disjvr_0^0) /\ (__disjvr_0^0 = undef22), par{__disjvr_0^0 -> undef22}> Fresh variables: undef1, undef8, undef18, undef22, Undef variables: undef1, undef8, undef18, undef22, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, 1 + x_5^0 <= y_6^0 /\ undef8 = 0, {y_6^0 -> -1 + y_6^0, rest remain the same}> <l1, l1, 1 + x_5^0 <= y_6^0 /\ __disjvr_0^0 = undef22, {__disjvr_0^0 -> undef22, rest remain the same}> Variables: x_5^0, y_6^0, __disjvr_0^0 Graph 2: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l1, true, {all remain the same}> Graph 2 <l1, l2, y_6^0 <= x_5^0, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 1 , 1 ) ( 2 , 2 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 popout

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job log

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actions

all output return to Integ Trans Syste 27634