details

property	value
status	complete
benchmark	p-42.t2.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n029.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp17
runtime (wallclock)	0.0309450626373 seconds
cpu usage	0.027473468
max memory	4268032.0

stage attributes

key	value
output-size	3222
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l6, true> <l1, l2, ((2 + (~(1) * x_6^0)) <= 0) /\ ((3 + (~(1) * w_5^0)) <= 0) /\ (undef1 = undef1), par{Result_4^0 -> undef1}> <l1, l3, ((2 + (~(1) * x_6^0)) <= 0) /\ (0 <= (2 + (~(1) * w_5^0))), par{w_5^0 -> (1 + w_5^0), x_6^0 -> (1 + x_6^0)}> <l3, l1, true> <l1, l4, (0 <= (1 + (~(1) * x_6^0))), par{w_5^0 -> (1 + w_5^0), x_6^0 -> (1 + x_6^0)}> <l4, l1, true> <l5, l1, true> <l6, l5, true> Fresh variables: undef1, Undef variables: undef1, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l1, true> <l1, l2, ((2 + (~(1) * x_6^0)) <= 0) /\ ((3 + (~(1) * w_5^0)) <= 0) /\ (undef1 = undef1)> <l1, l1, ((2 + (~(1) * x_6^0)) <= 0) /\ (0 <= (2 + (~(1) * w_5^0))), par{w_5^0 -> (1 + w_5^0), x_6^0 -> (1 + x_6^0)}> <l1, l1, (0 <= (1 + (~(1) * x_6^0))), par{w_5^0 -> (1 + w_5^0), x_6^0 -> (1 + x_6^0)}> Fresh variables: undef1, Undef variables: undef1, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, 2 <= x_6^0 /\ w_5^0 <= 2, {w_5^0 -> 1 + w_5^0, x_6^0 -> 1 + x_6^0, rest remain the same}> <l1, l1, x_6^0 <= 1, {w_5^0 -> 1 + w_5^0, x_6^0 -> 1 + x_6^0, rest remain the same}> Variables: w_5^0, x_6^0 Graph 2: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l1, true, {all remain the same}> Graph 2 <l1, l2, 2 <= x_6^0 /\ 3 <= w_5^0, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 1 , 1 ) ( 2 , 2 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to Integ Trans Syste 27634