Spaces
Explore
Communities
Statistics
Reports
Cluster
Status
Help
Integ Trans Syste 27634 pair #381738519
details
property
value
status
complete
benchmark
fibcall.t2_fixed.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n010.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0316128730774 seconds
cpu usage
0.027771938
max memory
4521984.0
stage attributes
key
value
output-size
3208
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l5, true> <l1, l2, ((1 + n3^0) <= (0 + i4^0)) /\ (undef4 = (0 + Fnew5^0)) /\ (undef7 = (0 + undef4)), par{ans8^0 -> undef4, ret_fib9^0 -> undef7, tmp^0 -> (0 + undef7)}> <l1, l3, ((0 + i4^0) <= (0 + n3^0)) /\ (undef17 = (0 + Fnew5^0)), par{Fnew5^0 -> ((0 + Fnew5^0) + Fold6^0), Fold6^0 -> (0 + undef17), i4^0 -> (1 + i4^0), temp7^0 -> undef17}> <l3, l1, true> <l4, l3, (undef30 = 30), par{Fnew5^0 -> 1, Fold6^0 -> 0, a^0 -> undef30, i4^0 -> 2, n3^0 -> (0 + undef30)}> <l5, l4, true> Fresh variables: undef4, undef7, undef17, undef30, Undef variables: undef4, undef7, undef17, undef30, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l3, (Fnew5^0 = 1) /\ (Fold6^0 = 0) /\ (i4^0 = 2) /\ (n3^0 = (0 + undef30)) /\ (undef30 = 30)> <l3, l2, ((1 + n3^0) <= (0 + i4^0)) /\ (undef4 = (0 + Fnew5^0)) /\ (undef7 = (0 + undef4))> <l3, l3, ((0 + i4^0) <= (0 + n3^0)) /\ (undef17 = (0 + Fnew5^0)), par{Fnew5^0 -> ((0 + Fnew5^0) + Fold6^0), Fold6^0 -> (0 + undef17), i4^0 -> (1 + i4^0)}> Fresh variables: undef4, undef7, undef17, undef30, Undef variables: undef4, undef7, undef17, undef30, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l3, l3, i4^0 <= n3^0 /\ Fnew5^0 = undef17, {Fnew5^0 -> Fnew5^0 + Fold6^0, Fold6^0 -> undef17, i4^0 -> 1 + i4^0, rest remain the same}> Variables: Fnew5^0, Fold6^0, i4^0, n3^0 Graph 2: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l3, Fold6^0 = 0 /\ n3^0 = undef30 /\ Fnew5^0 = 1 /\ undef30 = 30 /\ i4^0 = 2, {all remain the same}> Graph 2 <l3, l2, 1 + n3^0 <= i4^0 /\ Fnew5^0 = undef4 /\ undef4 = undef7, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 2 ) ( 3 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.003246 Checking conditional termination of SCC {l3}...
popout
output may be truncated. 'popout' for the full output.
job log
popout
actions
all output
return to Integ Trans Syste 27634