details

property	value
status	complete
benchmark	curious.t2.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n075.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp17
runtime (wallclock)	4.27735209465 seconds
cpu usage	5.631371044
max memory	1.64831232E8

stage attributes

key	value
output-size	4061
starexec-result	NO

output

/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l6, true> <l1, l2, (0 <= (0 + b^0)), par{b^0 -> 1}> <l2, l3, (undef3 = __disjvr_0^0) /\ (__disjvr_0^0 = undef3), par{__disjvr_0^0 -> undef3}> <l3, l4, true, par{b^0 -> 0}> <l4, l1, true> <l5, l1, true> <l6, l5, true> Fresh variables: undef3, Undef variables: undef3, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l1, true> <l1, l1, (0 <= (0 + b^0)) /\ (undef3 = __disjvr_0^0) /\ (__disjvr_0^0 = undef3), par{__disjvr_0^0 -> undef3, b^0 -> 0}> Fresh variables: undef3, Undef variables: undef3, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, 0 <= b^0 /\ __disjvr_0^0 = undef3, {__disjvr_0^0 -> undef3, b^0 -> 0, rest remain the same}> Variables: __disjvr_0^0, b^0 Precedence: Graph 0 Graph 1 <l0, l1, true, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 1 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.001776 Checking conditional termination of SCC {l1}... LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.000532s LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.001635s popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to Integ Trans Syste 27634