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Integ Trans Syste 27634 pair #381738783
details
property
value
status
complete
benchmark
acqrel-succeed2.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n010.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0552020072937 seconds
cpu usage
0.06618094
max memory
4.3794432E7
stage attributes
key
value
output-size
3578
starexec-result
NO
output
/export/starexec/sandbox2/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox2/benchmark/theBenchmark.smt2 /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l5, true> <l1, l2, ((0 + n^0) <= 0) /\ (undef5 = 0) /\ (undef3 = undef3), par{R^0 -> 0, dobreak^0 -> undef3}> <l1, l3, (1 <= (0 + n^0)), par{n^0 -> (~(1) + n^0)}> <l3, l1, true> <l2, l1, ((0 + dobreak^0) <= 0) /\ (undef18 = 1), par{A^0 -> 0}> <l4, l2, (undef21 = undef21) /\ (undef22 = undef22), par{A^0 -> 0, R^0 -> 0, dobreak^0 -> undef21, n^0 -> undef22}> <l5, l4, true> Fresh variables: undef3, undef5, undef18, undef21, undef22, Undef variables: undef3, undef5, undef18, undef21, undef22, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l1, (n^0 = undef22) /\ (undef21 = undef21) /\ (undef22 = undef22) /\ ((0 + undef21) <= 0) /\ (undef18 = 1)> <l1, l1, ((0 + n^0) <= 0) /\ (undef5 = 0) /\ (undef3 = undef3) /\ ((0 + undef3) <= 0) /\ (undef18 = 1)> <l1, l1, (1 <= (0 + n^0)), par{n^0 -> (~(1) + n^0)}> Fresh variables: undef3, undef5, undef18, undef21, undef22, Undef variables: undef3, undef5, undef18, undef21, undef22, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, n^0 <= 0 /\ undef3 <= 0 /\ undef5 = 0 /\ undef18 = 1, {all remain the same}> <l1, l1, 1 <= n^0, {n^0 -> -1 + n^0, rest remain the same}> Variables: n^0 Precedence: Graph 0 Graph 1 <l0, l1, undef21 <= 0 /\ n^0 = undef22 /\ undef18 = 1, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 1 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.002541 Checking conditional termination of SCC {l1}... LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.000559s �[33mRanking function: �[36m-1 + n^0�[0m New Graphs:
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