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Integ Trans Syste 27634 pair #381738825
details
property
value
status
complete
benchmark
ex34.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n093.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.032653093338 seconds
cpu usage
0.029732061
max memory
4096000.0
stage attributes
key
value
output-size
6026
starexec-result
YES
output
/export/starexec/sandbox2/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox2/benchmark/theBenchmark.smt2 /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l3, true> <l1, l2, (undef33 = undef33) /\ (undef17 = (0 + undef33)) /\ (undef25 = (0 + undef17)) /\ (undef41 = (0 + undef25)) /\ (undef34 = undef34) /\ (undef18 = (0 + undef34)) /\ (undef26 = (0 + undef18)) /\ (undef42 = (0 + undef26)) /\ (undef35 = undef35) /\ (undef19 = (0 + undef35)) /\ (undef27 = (0 + undef19)) /\ (undef43 = (0 + undef27)) /\ (undef36 = undef36) /\ (undef20 = (0 + undef36)) /\ (undef28 = (0 + undef20)) /\ (undef44 = (0 + undef28)) /\ (undef37 = undef37) /\ (undef21 = (0 + undef37)) /\ (undef29 = (0 + undef21)) /\ (undef45 = (0 + undef29)) /\ (undef38 = undef38) /\ (undef22 = (0 + undef38)) /\ (undef30 = (0 + undef22)) /\ (undef46 = (0 + undef30)) /\ (undef39 = undef39) /\ (undef23 = (0 + undef39)) /\ (undef31 = (0 + undef23)) /\ (undef47 = (0 + undef31)) /\ (undef40 = undef40) /\ (undef24 = (0 + undef40)) /\ (undef32 = (0 + undef24)) /\ (undef48 = (0 + undef32)), par{i1^0 -> (0 + undef41), i2^0 -> (0 + undef42), i3^0 -> (0 + undef43), i4^0 -> (0 + undef44), i5^0 -> (0 + undef45), i6^0 -> (0 + undef46), i7^0 -> (0 + undef47), i8^0 -> (0 + undef48), n17^0 -> 2, n21^0 -> 2, n25^0 -> 2, n29^0 -> 2, n33^0 -> 2, n37^0 -> 2, n41^0 -> 2, n45^0 -> 2, ret18^0 -> undef17, ret22^0 -> undef18, ret26^0 -> undef19, ret30^0 -> undef20, ret34^0 -> undef21, ret38^0 -> undef22, ret42^0 -> undef23, ret46^0 -> undef24, ret_fn120^0 -> undef25, ret_fn124^0 -> undef26, ret_fn128^0 -> undef27, ret_fn132^0 -> undef28, ret_fn136^0 -> undef29, ret_fn140^0 -> undef30, ret_fn144^0 -> undef31, ret_fn148^0 -> undef32, tmp19^0 -> undef33, tmp23^0 -> undef34, tmp27^0 -> undef35, tmp31^0 -> undef36, tmp35^0 -> undef37, tmp39^0 -> undef38, tmp43^0 -> undef39, tmp47^0 -> undef40, tmp^0 -> undef41, tmp___0^0 -> undef42, tmp___1^0 -> undef43, tmp___2^0 -> undef44, tmp___3^0 -> undef45, tmp___4^0 -> undef46, tmp___5^0 -> undef47, tmp___6^0 -> undef48}> <l3, l1, true> Fresh variables: undef17, undef18, undef19, undef20, undef21, undef22, undef23, undef24, undef25, undef26, undef27, undef28, undef29, undef30, undef31, undef32, undef33, undef34, undef35, undef36, undef37, undef38, undef39, undef40, undef41, undef42, undef43, undef44, undef45, undef46, undef47, undef48, Undef variables: undef17, undef18, undef19, undef20, undef21, undef22, undef23, undef24, undef25, undef26, undef27, undef28, undef29, undef30, undef31, undef32, undef33, undef34, undef35, undef36, undef37, undef38, undef39, undef40, undef41, undef42, undef43, undef44, undef45, undef46, undef47, undef48, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, (undef33 = undef33) /\ (undef17 = (0 + undef33)) /\ (undef25 = (0 + undef17)) /\ (undef41 = (0 + undef25)) /\ (undef34 = undef34) /\ (undef18 = (0 + undef34)) /\ (undef26 = (0 + undef18)) /\ (undef42 = (0 + undef26)) /\ (undef35 = undef35) /\ (undef19 = (0 + undef35)) /\ (undef27 = (0 + undef19)) /\ (undef43 = (0 + undef27)) /\ (undef36 = undef36) /\ (undef20 = (0 + undef36)) /\ (undef28 = (0 + undef20)) /\ (undef44 = (0 + undef28)) /\ (undef37 = undef37) /\ (undef21 = (0 + undef37)) /\ (undef29 = (0 + undef21)) /\ (undef45 = (0 + undef29)) /\ (undef38 = undef38) /\ (undef22 = (0 + undef38)) /\ (undef30 = (0 + undef22)) /\ (undef46 = (0 + undef30)) /\ (undef39 = undef39) /\ (undef23 = (0 + undef39)) /\ (undef31 = (0 + undef23)) /\ (undef47 = (0 + undef31)) /\ (undef40 = undef40) /\ (undef24 = (0 + undef40)) /\ (undef32 = (0 + undef24)) /\ (undef48 = (0 + undef32))> Fresh variables: undef17, undef18, undef19, undef20, undef21, undef22, undef23, undef24, undef25, undef26, undef27, undef28, undef29, undef30, undef31, undef32, undef33, undef34, undef35, undef36, undef37, undef38, undef39, undef40, undef41, undef42, undef43, undef44, undef45, undef46, undef47, undef48, Undef variables: undef17, undef18, undef19, undef20, undef21, undef22, undef23, undef24, undef25, undef26, undef27, undef28, undef29, undef30, undef31, undef32, undef33, undef34, undef35, undef36, undef37, undef38, undef39, undef40, undef41, undef42, undef43, undef44, undef45, undef46, undef47, undef48, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l2, undef17 = undef25 /\ undef17 = undef33 /\ undef18 = undef26 /\ undef18 = undef34 /\ undef19 = undef27 /\ undef19 = undef35 /\ undef20 = undef28 /\ undef20 = undef36 /\ undef21 = undef29 /\ undef21 = undef37 /\ undef22 = undef30 /\ undef22 = undef38 /\ undef23 = undef31 /\ undef23 = undef39 /\ undef24 = undef32 /\ undef24 = undef40 /\ undef25 = undef41 /\ undef26 = undef42 /\ undef27 = undef43 /\ undef28 = undef44 /\ undef29 = undef45 /\ undef30 = undef46 /\ undef31 = undef47 /\ undef32 = undef48, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Analyzing SCC {l2}... No cycles found. �[32mProgram Terminates�[0m
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