Integ Trans Syste 27634 pair #381738830

loading
details
property value
status timeout (wallclock)
benchmark Alternate.jar-obl-10.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
space From_AProVE_2014
run statistics
property value
solver Ctrl
configuration Transition
runtime (wallclock) 301.008352041 seconds
cpu usage 391.540872161
max memory 5.2158464E7
stage attributes

unavailable

loading output popout

output may be truncated. 'popout' for the full output.

loading job log

	
				popout
			
actions all output return to Integ Trans Syste 27634