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Integ Trans Syste 27634 pair #381738976
details
property
value
status
complete
benchmark
DivMinus2.jar-obl-8.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n071.star.cs.uiowa.edu
space
From_AProVE_2014
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0794758796692 seconds
cpu usage
0.075680865
max memory
8433664.0
stage attributes
key
value
output-size
5436
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l4, true> <l1, l2, (undef3 > ~(1)) /\ (arg2 > ~(1)) /\ (undef2 > ~(1)) /\ (arg1 > 0), par{arg1 -> 0, arg2 -> undef2, arg3 -> undef3, arg4 -> undef4, arg5 -> undef5}> <l2, l3, (arg3 <= arg2) /\ (arg3 > 0), par{arg1 -> arg3, arg2 -> arg1, arg3 -> arg2, arg4 -> arg3, arg5 -> arg3}> <l3, l3, (arg4 < 0) /\ (arg4 < 1) /\ (arg4 = arg5), par{arg3 -> (arg3 + 1), arg4 -> (arg4 + 1), arg5 -> (arg4 + 1)}> <l3, l3, (arg4 > 0) /\ (arg4 < 1) /\ (arg4 = arg5), par{arg3 -> (arg3 + 1), arg4 -> (arg4 + 1), arg5 -> (arg4 + 1)}> <l3, l3, (arg4 > 0) /\ (arg4 = arg5), par{arg3 -> (arg3 - 1), arg4 -> (arg4 - 1), arg5 -> (arg4 - 1)}> <l3, l2, (arg2 > ~(1)) /\ (0 = arg4) /\ (0 = arg5), par{arg1 -> (arg2 + 1), arg2 -> arg3, arg3 -> arg1, arg4 -> undef29, arg5 -> undef30}> <l4, l1, true, par{arg1 -> undef31, arg2 -> undef32, arg3 -> undef33, arg4 -> undef34, arg5 -> undef35}> Fresh variables: undef2, undef3, undef4, undef5, undef29, undef30, undef31, undef32, undef33, undef34, undef35, Undef variables: undef2, undef3, undef4, undef5, undef29, undef30, undef31, undef32, undef33, undef34, undef35, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l3, (arg1 = undef3) /\ (arg2 = 0) /\ (arg3 = undef2) /\ (arg4 = undef3) /\ (arg5 = undef3) /\ (undef3 > ~(1)) /\ (undef32 > ~(1)) /\ (undef2 > ~(1)) /\ (undef31 > 0) /\ (undef3 <= undef2) /\ (undef3 > 0)> <l3, l3, (arg4 < 0) /\ (arg4 < 1) /\ (arg4 = arg5), par{arg3 -> (arg3 + 1), arg4 -> (arg4 + 1), arg5 -> (arg4 + 1)}> <l3, l3, (arg4 > 0) /\ (arg4 = arg5), par{arg3 -> (arg3 - 1), arg4 -> (arg4 - 1), arg5 -> (arg4 - 1)}> <l3, l3, (arg2 > ~(1)) /\ (0 = arg4) /\ (0 = arg5) /\ (arg1 <= arg3) /\ (arg1 > 0), par{arg1 -> arg1, arg2 -> (arg2 + 1), arg3 -> arg3, arg4 -> arg1, arg5 -> arg1}> Fresh variables: undef2, undef3, undef4, undef5, undef29, undef30, undef31, undef32, undef33, undef34, undef35, Undef variables: undef2, undef3, undef4, undef5, undef29, undef30, undef31, undef32, undef33, undef34, undef35, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l3, l3, 1 + arg4 <= 0 /\ arg4 = arg5, {arg3 -> 1 + arg3, arg4 -> 1 + arg4, arg5 -> 1 + arg4, rest remain the same}> <l3, l3, 1 <= arg4 /\ arg4 = arg5, {arg3 -> -1 + arg3, arg4 -> -1 + arg4, arg5 -> -1 + arg4, rest remain the same}> <l3, l3, 1 <= arg1 /\ arg1 <= arg3 /\ 0 <= arg2 /\ arg4 = 0 /\ arg5 = 0, {arg2 -> 1 + arg2, arg4 -> arg1, arg5 -> arg1, rest remain the same}> Variables: arg3, arg4, arg5, arg1, arg2 Precedence: Graph 0 Graph 1 <l0, l3, 1 <= undef3 /\ 1 <= undef31 /\ 0 <= undef2 /\ undef3 <= undef2 /\ 0 <= undef32 /\ arg1 = undef3 /\ arg2 = 0 /\ arg3 = undef2 /\ arg4 = undef3 /\ arg5 = undef3, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 3 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.017966 �[33mSome transition disabled by a set of invariant(s):�[0m �[36mInvariant at l3: 0 <= arg5�[0m �[33mStrengthening and disabling transitions...�[0m > It's unfeasible. Removing transition:
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