Integ Trans Syste 27634 pair #381739209

loading
details
property value
status complete
benchmark sort.t2_fixed.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
execution host n087.star.cs.uiowa.edu
space From_T2
run statistics
property value
solver VeryMax-termCOMP17
configuration termcomp17
runtime (wallclock) 0.31530213356 seconds
cpu usage 0.311951318
max memory 4.2893312E7
stage attributes
key value
output-size 17150
starexec-result YES
loading output popout

output may be truncated. 'popout' for the full output.

loading job log

	
				popout
			
actions all output return to Integ Trans Syste 27634