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Integ Trans Syste 27634 pair #381739424
details
property
value
status
complete
benchmark
p-40.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n106.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0295939445496 seconds
cpu usage
0.025739374
max memory
4087808.0
stage attributes
key
value
output-size
3229
starexec-result
YES
output
/export/starexec/sandbox2/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox2/benchmark/theBenchmark.smt2 /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l6, true> <l1, l2, (undef8 = (0 + s_17^0)) /\ (undef3 = (0 + s_16^0)), par{i_13^0 -> (0 + undef3), j_15^0 -> undef3}> <l3, l4, ((0 + __const_500^0) <= (0 + i_13^0)), par{rt_11^0 -> (0 + st_14^0)}> <l3, l5, ((1 + i_13^0) <= (0 + __const_500^0)), par{i_13^0 -> (1 + i_13^0)}> <l5, l3, true> <l2, l4, ((0 + __const_500^0) <= (0 + i_13^0)), par{rt_11^0 -> (0 + st_14^0)}> <l2, l3, ((1 + i_13^0) <= (0 + __const_500^0)), par{i_13^0 -> (1 + i_13^0)}> <l6, l1, true> Fresh variables: undef3, undef8, Undef variables: undef3, undef8, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l4, (undef8 = (0 + s_17^0)) /\ (undef3 = (0 + s_16^0)) /\ ((0 + __const_500^0) <= (0 + (0 + undef3))), par{i_13^0 -> (0 + undef3)}> <l0, l3, (undef8 = (0 + s_17^0)) /\ (undef3 = (0 + s_16^0)) /\ ((1 + (0 + undef3)) <= (0 + __const_500^0)), par{i_13^0 -> (1 + (0 + undef3))}> <l3, l4, ((0 + __const_500^0) <= (0 + i_13^0))> <l3, l3, ((1 + i_13^0) <= (0 + __const_500^0)), par{i_13^0 -> (1 + i_13^0)}> Fresh variables: undef3, undef8, Undef variables: undef3, undef8, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l3, l3, 1 + i_13^0 <= __const_500^0, {i_13^0 -> 1 + i_13^0, rest remain the same}> Variables: __const_500^0, i_13^0 Graph 2: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l3, 1 + undef3 <= __const_500^0 /\ s_16^0 = undef3 /\ s_17^0 = undef8, {i_13^0 -> 1 + undef3, rest remain the same}> Graph 2 <l0, l4, __const_500^0 <= undef3 /\ s_16^0 = undef3 /\ s_17^0 = undef8, {i_13^0 -> undef3, rest remain the same}> <l3, l4, __const_500^0 <= i_13^0, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 3 , 1 ) ( 4 , 2 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1
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