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Integ Trans Syste 27634 pair #381739505
details
property
value
status
complete
benchmark
l1.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n096.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
4.41352891922 seconds
cpu usage
6.034889086
max memory
9.4908416E7
stage attributes
key
value
output-size
7279
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l4, true> <l1, l2, (0 <= (0 + x^0)) /\ ((0 + t^0) <= (0 + y^0)), par{x^0 -> ((0 + x^0) + y^0)}> <l2, l1, true> <l3, l1, (undef10 = ~(1)) /\ (undef11 = (~(1) + undef10)) /\ (undef12 = (~(1) + undef11)) /\ (undef13 = (~(1) + undef12)) /\ (undef14 = (~(1) + undef13)) /\ (undef15 = (~(1) + undef14)) /\ (undef16 = (~(1) + undef15)) /\ (undef17 = (~(1) + undef16)) /\ (undef18 = (~(1) + undef17)) /\ (undef7 = (~(1) + undef18)) /\ (~(1) <= (0 + x^0)) /\ ((0 + undef7) <= (0 + y^0)), par{t^0 -> undef7}> <l4, l3, true> Fresh variables: undef7, undef10, undef11, undef12, undef13, undef14, undef15, undef16, undef17, undef18, Undef variables: undef7, undef10, undef11, undef12, undef13, undef14, undef15, undef16, undef17, undef18, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l1, (t^0 = undef7) /\ (undef10 = ~(1)) /\ (undef11 = (~(1) + undef10)) /\ (undef12 = (~(1) + undef11)) /\ (undef13 = (~(1) + undef12)) /\ (undef14 = (~(1) + undef13)) /\ (undef15 = (~(1) + undef14)) /\ (undef16 = (~(1) + undef15)) /\ (undef17 = (~(1) + undef16)) /\ (undef18 = (~(1) + undef17)) /\ (undef7 = (~(1) + undef18)) /\ (~(1) <= (0 + x^0)) /\ ((0 + undef7) <= (0 + y^0))> <l1, l1, (0 <= (0 + x^0)) /\ ((0 + t^0) <= (0 + y^0)), par{x^0 -> ((0 + x^0) + y^0)}> Fresh variables: undef7, undef10, undef11, undef12, undef13, undef14, undef15, undef16, undef17, undef18, Undef variables: undef7, undef10, undef11, undef12, undef13, undef14, undef15, undef16, undef17, undef18, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, t^0 <= y^0 /\ 0 <= x^0, {x^0 -> x^0 + y^0, rest remain the same}> Variables: t^0, x^0, y^0 Precedence: Graph 0 Graph 1 <l0, l1, undef7 <= y^0 /\ 0 <= 1 + x^0 /\ t^0 = undef7 /\ 1 + undef7 = undef18 /\ 1 + undef10 = 0 /\ undef10 = 1 + undef11 /\ undef11 = 1 + undef12 /\ undef12 = 1 + undef13 /\ undef13 = 1 + undef14 /\ undef14 = 1 + undef15 /\ undef15 = 1 + undef16 /\ undef16 = 1 + undef17 /\ undef17 = 1 + undef18, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 1 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.003028 Checking conditional termination of SCC {l1}... LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.000786s LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.001949s [46528 : 46529] [46528 : 46530]
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