details

property	value
status	complete
benchmark	ex10.t2.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n058.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp17
runtime (wallclock)	8.4315071106 seconds
cpu usage	18.943973928
max memory	2.51097088E8

stage attributes

key	value
output-size	7045
starexec-result	NO

output

/export/starexec/sandbox2/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox2/benchmark/theBenchmark.smt2 /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l13, true> <l1, l2, (undef3 = undef3), par{i6^0 -> undef3}> <l1, l3, true, par{ret_f19^0 -> 1}> <l3, l4, true, par{tmp^0 -> (0 + ret_f19^0)}> <l5, l3, true, par{ret_f19^0 -> (0 + ret28^0)}> <l6, l3, ((0 + ret28^0) <= 0) /\ (0 <= (0 + ret28^0)), par{ret_f19^0 -> 0}> <l6, l5, (1 <= (0 + ret28^0))> <l6, l5, ((1 + ret28^0) <= 0)> <l7, l1, true> <l7, l4, true> <l8, l3, true, par{ret_f19^0 -> (0 + ret17^0)}> <l9, l2, ((0 + ret17^0) <= 0) /\ (0 <= (0 + ret17^0)), par{i6^0 -> (~(1) + i6^0)}> <l9, l8, (1 <= (0 + ret17^0))> <l9, l8, ((1 + ret17^0) <= 0)> <l2, l10, true> <l11, l9, (undef164 = undef164) /\ (undef161 = 0), par{data16^0 -> (0 + undef164), ret17^0 -> (0 + undef161), ret_f212^0 -> undef161, val10^0 -> undef164}> <l10, l6, ((0 + i6^0) <= 0) /\ (0 <= (0 + i6^0)) /\ (undef176 = undef176) /\ (undef173 = 0), par{data18^0 -> (0 + undef176), ret28^0 -> (0 + undef173), ret_f215^0 -> undef173, val13^0 -> undef176}> <l10, l11, (1 <= (0 + i6^0))> <l10, l11, ((1 + i6^0) <= 0)> <l12, l7, true> <l13, l12, true> Fresh variables: undef3, undef161, undef164, undef173, undef176, Undef variables: undef3, undef161, undef164, undef173, undef176, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, (undef3 = undef3), par{i6^0 -> undef3}> <l0, l4, true> <l0, l4, true> <l2, l4, ((0 + i6^0) <= 0) /\ (0 <= (0 + i6^0)) /\ (undef176 = undef176) /\ (undef173 = 0) /\ ((0 + (0 + undef173)) <= 0) /\ (0 <= (0 + (0 + undef173)))> <l2, l2, (1 <= (0 + i6^0)) /\ (undef164 = undef164) /\ (undef161 = 0) /\ ((0 + (0 + undef161)) <= 0) /\ (0 <= (0 + (0 + undef161))), par{i6^0 -> (~(1) + i6^0)}> <l2, l2, ((1 + i6^0) <= 0) /\ (undef164 = undef164) /\ (undef161 = 0) /\ ((0 + (0 + undef161)) <= 0) /\ (0 <= (0 + (0 + undef161))), par{i6^0 -> (~(1) + i6^0)}> Fresh variables: undef3, undef161, undef164, undef173, undef176, Undef variables: undef3, undef161, undef164, undef173, undef176, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l2, l2, 1 <= i6^0 /\ undef161 = 0, {i6^0 -> -1 + i6^0, rest remain the same}> <l2, l2, 1 + i6^0 <= 0 /\ undef161 = 0, {i6^0 -> -1 + i6^0, rest remain the same}> Variables: i6^0 Graph 2: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l2, true, {i6^0 -> undef3, rest remain the same}> popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to Integ Trans Syste 27634