Integ Trans Syste 27634 pair #381739796

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details
property value
status complete
benchmark reverse_div4.t2_fixed.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
execution host n035.star.cs.uiowa.edu
space From_T2
run statistics
property value
solver VeryMax-termCOMP17
configuration termcomp17
runtime (wallclock) 9.91272497177 seconds
cpu usage 16.513175971
max memory 3.04754688E8
stage attributes
key value
output-size 56760
starexec-result NO
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