Integ Trans Syste 27634 pair #381739801

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details
property value
status complete
benchmark fermat.t2.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
execution host n045.star.cs.uiowa.edu
space From_T2
run statistics
property value
solver Ctrl
configuration Transition
runtime (wallclock) 188.961495876 seconds
cpu usage 199.459704184
max memory 3.0674944E7
stage attributes
key value
output-size 31495
starexec-result YES
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