details

property	value
status	complete
benchmark	disj_nightmare.t2.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n072.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp17
runtime (wallclock)	15.6752271652 seconds
cpu usage	50.002029314
max memory	4.8334848E8

stage attributes

key	value
output-size	25931
starexec-result	NO

output

/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l19, true> <l1, l2, true> <l2, l3, (undef18 = __disjvr_0^0) /\ (__disjvr_0^0 = undef18), par{__disjvr_0^0 -> undef18}> <l3, l4, ((0 + x^0) <= 0) /\ (0 <= (0 + x^0)), par{x^0 -> (0 + y^0)}> <l4, l5, (undef58 = __disjvr_1^0) /\ (__disjvr_1^0 = undef58), par{__disjvr_1^0 -> undef58}> <l5, l6, (undef76 = __disjvr_2^0) /\ (__disjvr_2^0 = undef76), par{__disjvr_2^0 -> undef76}> <l6, l7, (undef94 = __disjvr_3^0) /\ (__disjvr_3^0 = undef94), par{__disjvr_3^0 -> undef94}> <l7, l8, (undef112 = __disjvr_4^0) /\ (__disjvr_4^0 = undef112), par{__disjvr_4^0 -> undef112}> <l8, l9, (undef130 = __disjvr_5^0) /\ (__disjvr_5^0 = undef130), par{__disjvr_5^0 -> undef130}> <l9, l10, (undef148 = __disjvr_6^0) /\ (__disjvr_6^0 = undef148), par{__disjvr_6^0 -> undef148}> <l10, l11, (undef166 = __disjvr_7^0) /\ (__disjvr_7^0 = undef166), par{__disjvr_7^0 -> undef166}> <l11, l12, (undef184 = __disjvr_8^0) /\ (__disjvr_8^0 = undef184), par{__disjvr_8^0 -> undef184}> <l12, l13, (undef202 = __disjvr_9^0) /\ (__disjvr_9^0 = undef202), par{__disjvr_9^0 -> undef202}> <l13, l14, (undef206 = __disjvr_10^0) /\ (__disjvr_10^0 = undef206), par{__disjvr_10^0 -> undef206}> <l14, l15, (undef224 = __disjvr_11^0) /\ (__disjvr_11^0 = undef224), par{__disjvr_11^0 -> undef224}> <l15, l16, (undef242 = __disjvr_12^0) /\ (__disjvr_12^0 = undef242), par{__disjvr_12^0 -> undef242}> <l16, l17, (undef260 = __disjvr_13^0) /\ (__disjvr_13^0 = undef260), par{__disjvr_13^0 -> undef260}> <l17, l18, (undef278 = __disjvr_14^0) /\ (__disjvr_14^0 = undef278), par{__disjvr_14^0 -> undef278}> <l18, l2, true> <l19, l1, true> Fresh variables: undef18, undef58, undef76, undef94, undef112, undef130, undef148, undef166, undef184, undef202, undef206, undef224, undef242, undef260, undef278, Undef variables: undef18, undef58, undef76, undef94, undef112, undef130, undef148, undef166, undef184, undef202, undef206, undef224, undef242, undef260, undef278, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, true> <l2, l2, (undef18 = __disjvr_0^0) /\ (__disjvr_0^0 = undef18) /\ ((0 + x^0) <= 0) /\ (0 <= (0 + x^0)) /\ (undef58 = __disjvr_1^0) /\ (__disjvr_1^0 = undef58) /\ (undef76 = __disjvr_2^0) /\ (__disjvr_2^0 = undef76) /\ (undef94 = __disjvr_3^0) /\ (__disjvr_3^0 = undef94) /\ (undef112 = __disjvr_4^0) /\ (__disjvr_4^0 = undef112) /\ (undef130 = __disjvr_5^0) /\ (__disjvr_5^0 = undef130) /\ (undef148 = __disjvr_6^0) /\ (__disjvr_6^0 = undef148) /\ (undef166 = __disjvr_7^0) /\ (__disjvr_7^0 = undef166) /\ (undef184 = __disjvr_8^0) /\ (__disjvr_8^0 = undef184) /\ (undef202 = __disjvr_9^0) /\ (__disjvr_9^0 = undef202) /\ (undef206 = __disjvr_10^0) /\ (__disjvr_10^0 = undef206) /\ (undef224 = __disjvr_11^0) /\ (__disjvr_11^0 = undef224) /\ (undef242 = __disjvr_12^0) /\ (__disjvr_12^0 = undef242) /\ (undef260 = __disjvr_13^0) /\ (__disjvr_13^0 = undef260) /\ (undef278 = __disjvr_14^0) /\ (__disjvr_14^0 = undef278), par{__disjvr_0^0 -> undef18, __disjvr_10^0 -> undef206, __disjvr_11^0 -> undef224, __disjvr_12^0 -> undef242, __disjvr_13^0 -> undef260, __disjvr_14^0 -> undef278, __disjvr_1^0 -> undef58, __disjvr_2^0 -> undef76, __disjvr_3^0 -> undef94, __disjvr_4^0 -> undef112, __disjvr_5^0 -> undef130, __disjvr_6^0 -> undef148, __disjvr_7^0 -> undef166, __disjvr_8^0 -> undef184, __disjvr_9^0 -> undef202, x^0 -> (0 + y^0)}> Fresh variables: undef18, undef58, undef76, undef94, undef112, undef130, undef148, undef166, undef184, undef202, undef206, undef224, undef242, undef260, undef278, Undef variables: undef18, undef58, undef76, undef94, undef112, undef130, undef148, undef166, undef184, undef202, undef206, undef224, undef242, undef260, undef278, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l2, l2, __disjvr_0^0 = undef18 /\ __disjvr_10^0 = undef206 /\ __disjvr_11^0 = undef224 /\ __disjvr_12^0 = undef242 /\ __disjvr_13^0 = undef260 /\ __disjvr_14^0 = undef278 /\ __disjvr_1^0 = undef58 /\ __disjvr_2^0 = undef76 /\ __disjvr_3^0 = undef94 /\ __disjvr_4^0 = undef112 /\ __disjvr_5^0 = undef130 /\ __disjvr_6^0 = undef148 /\ __disjvr_7^0 = undef166 /\ __disjvr_8^0 = undef184 /\ __disjvr_9^0 = undef202 /\ x^0 = 0, {__disjvr_0^0 -> undef18, __disjvr_10^0 -> undef206, __disjvr_11^0 -> undef224, __disjvr_12^0 -> undef242, __disjvr_13^0 -> undef260, __disjvr_14^0 -> undef278, __disjvr_1^0 -> undef58, __disjvr_2^0 -> undef76, __disjvr_3^0 -> undef94, __disjvr_4^0 -> undef112, __disjvr_5^0 -> undef130, __disjvr_6^0 -> undef148, __disjvr_7^0 -> undef166, __disjvr_8^0 -> undef184, __disjvr_9^0 -> undef202, x^0 -> y^0, rest remain the same}> Variables: __disjvr_0^0, __disjvr_10^0, __disjvr_11^0, __disjvr_12^0, __disjvr_13^0, __disjvr_14^0, __disjvr_1^0, __disjvr_2^0, __disjvr_3^0, __disjvr_4^0, __disjvr_5^0, __disjvr_6^0, __disjvr_7^0, __disjvr_8^0, __disjvr_9^0, x^0, y^0 Precedence: Graph 0 Graph 1 <l0, l2, true, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 popout

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all output return to Integ Trans Syste 27634