Integ Trans Syste 27634 pair #381739930

loading
details
property value
status complete
benchmark bf18.t2_fixed.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
execution host n110.star.cs.uiowa.edu
space From_T2
run statistics
property value
solver Ctrl
configuration Transition
runtime (wallclock) 73.6162919998 seconds
cpu usage 77.611017517
max memory 3.1014912E7
stage attributes
key value
output-size 41848
starexec-result YES
loading output popout

output may be truncated. 'popout' for the full output.

loading job log

	
				popout
			
actions all output return to Integ Trans Syste 27634