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Integ Trans Syste 27634 pair #381740240
details
property
value
status
complete
benchmark
neg-e-smagill-succeed.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n054.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0552749633789 seconds
cpu usage
0.059463295
max memory
4.1713664E7
stage attributes
key
value
output-size
5340
starexec-result
NO
output
/export/starexec/sandbox2/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox2/benchmark/theBenchmark.smt2 /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l10, true> <l1, l2, true> <l3, l4, true> <l5, l6, true> <l6, l5, true> <l7, l1, ((0 + ___rho_1_^0) <= 0) /\ ((1 + c^0) <= (0 + curr_serv^0)), par{curr_serv^0 -> (~(1) + curr_serv^0)}> <l7, l1, (1 <= (0 + ___rho_1_^0)), par{c^0 -> (~(1) + c^0), curr_serv^0 -> (~(1) + curr_serv^0), resp^0 -> (1 + resp^0)}> <l2, l7, (1 <= (0 + curr_serv^0)) /\ (undef37 = undef37), par{___rho_1_^0 -> undef37}> <l2, l5, ((0 + curr_serv^0) <= 0)> <l8, l5, (6 <= (0 + c^0))> <l8, l1, ((0 + c^0) <= 5)> <l9, l8, (undef62 = undef62) /\ (undef63 = (0 + undef62)) /\ (1 <= (0 + undef63)) /\ (undef66 = 4), par{___rho_2_^0 -> undef62, c^0 -> undef63, curr_serv^0 -> (0 + undef66), resp^0 -> 0, servers^0 -> undef66}> <l10, l9, true> Fresh variables: undef37, undef62, undef63, undef66, Undef variables: undef37, undef62, undef63, undef66, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l5, (c^0 = undef63) /\ (curr_serv^0 = (0 + undef66)) /\ (resp^0 = 0) /\ (undef62 = undef62) /\ (undef63 = (0 + undef62)) /\ (1 <= (0 + undef63)) /\ (undef66 = 4) /\ (6 <= (0 + undef63))> <l0, l1, (c^0 = undef63) /\ (curr_serv^0 = (0 + undef66)) /\ (resp^0 = 0) /\ (undef62 = undef62) /\ (undef63 = (0 + undef62)) /\ (1 <= (0 + undef63)) /\ (undef66 = 4) /\ ((0 + undef63) <= 5)> <l1, l1, (1 <= (0 + curr_serv^0)) /\ (undef37 = undef37) /\ ((0 + undef37) <= 0) /\ ((1 + c^0) <= (0 + curr_serv^0)), par{curr_serv^0 -> (~(1) + curr_serv^0)}> <l1, l1, (1 <= (0 + curr_serv^0)) /\ (undef37 = undef37) /\ (1 <= (0 + undef37)), par{c^0 -> (~(1) + c^0), curr_serv^0 -> (~(1) + curr_serv^0), resp^0 -> (1 + resp^0)}> <l1, l5, ((0 + curr_serv^0) <= 0)> <l5, l5, true> Fresh variables: undef37, undef62, undef63, undef66, Undef variables: undef37, undef62, undef63, undef66, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l1, l1, undef37 <= 0 /\ 1 + c^0 <= curr_serv^0 /\ 1 <= curr_serv^0, {curr_serv^0 -> -1 + curr_serv^0, rest remain the same}> <l1, l1, 1 <= curr_serv^0 /\ 1 <= undef37, {c^0 -> -1 + c^0, curr_serv^0 -> -1 + curr_serv^0, resp^0 -> 1 + resp^0, rest remain the same}> Variables: c^0, curr_serv^0, resp^0 Graph 2: Transitions: <l5, l5, true, {all remain the same}> Variables: Precedence: Graph 0 Graph 1 <l0, l1, 1 <= undef63 /\ undef63 <= 5 /\ c^0 = undef63 /\ curr_serv^0 = undef66 /\ resp^0 = 0 /\ undef62 = undef63 /\ undef66 = 4, {all remain the same}> Graph 2 <l0, l5, 6 <= undef63 /\ c^0 = undef63 /\ curr_serv^0 = undef66 /\ resp^0 = 0 /\ undef62 = undef63 /\ undef66 = 4, {all remain the same}> <l1, l5, curr_serv^0 <= 0, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 )
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