Integ Trans Syste 27634 pair #381740456

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details
property value
status complete
benchmark ud.t2.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
execution host n100.star.cs.uiowa.edu
space From_T2
run statistics
property value
solver VeryMax-termCOMP17
configuration termcomp17
runtime (wallclock) 4.31781888008 seconds
cpu usage 4.828059124
max memory 1.74718976E8
stage attributes
key value
output-size 22509
starexec-result YES
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