Spaces
Explore
Communities
Statistics
Reports
Cluster
Status
Help
Integ Trans Syste 27634 pair #381740495
details
property
value
status
complete
benchmark
arith.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n100.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp17
runtime (wallclock)
0.0284240245819 seconds
cpu usage
0.024712772
max memory
4218880.0
stage attributes
key
value
output-size
2906
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: <l0, l5, true> <l1, l2, (undef6 = undef6) /\ (undef1 = undef1), par{nondet!13^0 -> undef1, x!14^0 -> (0 + undef6)}> <l2, l3, ((0 + x!14^0) <= 0), par{result!12^0 -> (0 + temp0!15^0)}> <l2, l4, (1 <= (0 + x!14^0)) /\ (undef15 = (~(1) + x!14^0)) /\ ((0 + undef15) <= (~(1) + x!20^0)) /\ ((~(1) + x!20^0) <= (0 + undef15)) /\ (1 <= (0 + x!20^0)), par{x!14^0 -> undef15}> <l4, l2, true> <l5, l1, true> Fresh variables: undef1, undef6, undef15, Undef variables: undef1, undef6, undef15, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: <l0, l2, (x!14^0 = (0 + undef6)) /\ (undef6 = undef6) /\ (undef1 = undef1)> <l2, l3, ((0 + x!14^0) <= 0)> <l2, l2, (1 <= (0 + x!14^0)) /\ (undef15 = (~(1) + x!14^0)) /\ ((0 + undef15) <= (~(1) + x!20^0)) /\ ((~(1) + x!20^0) <= (0 + undef15)) /\ (1 <= (0 + x!20^0)), par{x!14^0 -> undef15}> Fresh variables: undef1, undef6, undef15, Undef variables: undef1, undef6, undef15, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: <l2, l2, 1 <= x!14^0 /\ 1 <= x!20^0 /\ x!14^0 = 1 + undef15 /\ x!20^0 = 1 + undef15, {x!14^0 -> undef15, rest remain the same}> Variables: x!14^0, x!20^0 Graph 2: Transitions: Variables: Precedence: Graph 0 Graph 1 <l0, l2, x!14^0 = undef6, {all remain the same}> Graph 2 <l2, l3, x!14^0 <= 0, {all remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 2 , 1 ) ( 3 , 2 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.002115 Checking conditional termination of SCC {l2}...
popout
output may be truncated. 'popout' for the full output.
job log
popout
actions
all output
return to Integ Trans Syste 27634