details

property	value
status	complete
benchmark	nested_loop.c.koat
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n014.star.cs.uiowa.edu
space	Flores-Montoya_16

run statistics

property	value
solver	CoFloCo 2018
configuration	its
runtime (wallclock)	6.42489004135 seconds
cpu usage	6.343581998
max memory	2.3834624E7

stage attributes

key	value
output-size	78114
starexec-result	WORST_CASE(?,O(n^2))

output

/export/starexec/sandbox/solver/bin/starexec_run_its /export/starexec/sandbox/benchmark/theBenchmark.koat /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- WORST_CASE(?,O(n^2)) Preprocessing Cost Relations ===================================== #### Computed strongly connected components 0. non_recursive : [eval_nestedLoop_stop/13] 1. non_recursive : [eval_nestedLoop__critedge_in/13] 2. recursive : [eval_nestedLoop_10/9,eval_nestedLoop_11/9,eval_nestedLoop_bb5_in/9,eval_nestedLoop_bb6_in/9,eval_nestedLoop_bb7_in/9] 3. recursive : [eval_nestedLoop_6/15,eval_nestedLoop_7/15,eval_nestedLoop__critedge3_in/15,eval_nestedLoop_bb3_in/15,eval_nestedLoop_bb4_in/15,eval_nestedLoop_bb5_in_loop_cont/16] 4. recursive : [eval_nestedLoop_15/22,eval_nestedLoop_16/22,eval_nestedLoop_4/22,eval_nestedLoop_5/22,eval_nestedLoop__critedge2_in/22,eval_nestedLoop__critedge3_in_loop_cont/23,eval_nestedLoop_bb1_in/22,eval_nestedLoop_bb2_in/22] 5. non_recursive : [exit_location/1] 6. non_recursive : [eval_nestedLoop_bb1_in_loop_cont/14] 7. non_recursive : [eval_nestedLoop_3/13] 8. non_recursive : [eval_nestedLoop_2/13] 9. non_recursive : [eval_nestedLoop_1/13] 10. non_recursive : [eval_nestedLoop_0/13] 11. non_recursive : [eval_nestedLoop_bb0_in/13] 12. non_recursive : [eval_nestedLoop_start/13] #### Obtained direct recursion through partial evaluation 0. SCC is completely evaluated into other SCCs 1. SCC is completely evaluated into other SCCs 2. SCC is partially evaluated into eval_nestedLoop_bb5_in/9 3. SCC is partially evaluated into eval_nestedLoop__critedge3_in/15 4. SCC is partially evaluated into eval_nestedLoop_bb1_in/22 5. SCC is completely evaluated into other SCCs 6. SCC is partially evaluated into eval_nestedLoop_bb1_in_loop_cont/14 7. SCC is partially evaluated into eval_nestedLoop_3/13 8. SCC is completely evaluated into other SCCs 9. SCC is completely evaluated into other SCCs 10. SCC is completely evaluated into other SCCs 11. SCC is completely evaluated into other SCCs 12. SCC is partially evaluated into eval_nestedLoop_start/13 Control-Flow Refinement of Cost Relations ===================================== ### Specialization of cost equations eval_nestedLoop_bb5_in/9 * CE 21 is refined into CE [22] * CE 18 is refined into CE [23] * CE 20 is refined into CE [24] * CE 19 is refined into CE [25] ### Cost equations --> "Loop" of eval_nestedLoop_bb5_in/9 * CEs [25] --> Loop 22 * CEs [22] --> Loop 23 * CEs [23] --> Loop 24 * CEs [24] --> Loop 25 ### Ranking functions of CR eval_nestedLoop_bb5_in(V_11,V_N,V_i_1,V_j_0,V_k_0,B,C,D,E) * RF of phase [22]: [V_N-V_k_0] #### Partial ranking functions of CR eval_nestedLoop_bb5_in(V_11,V_N,V_i_1,V_j_0,V_k_0,B,C,D,E) * Partial RF of phase [22]: - RF of loop [22:1]: V_N-V_k_0 ### Specialization of cost equations eval_nestedLoop__critedge3_in/15 * CE 13 is refined into CE [26] * CE 16 is refined into CE [27] * CE 15 is refined into CE [28,29] * CE 17 is refined into CE [30] * CE 14 is refined into CE [31,32,33,34] ### Cost equations --> "Loop" of eval_nestedLoop__critedge3_in/15 * CEs [34] --> Loop 26 * CEs [33] --> Loop 27 * CEs [32] --> Loop 28 * CEs [31] --> Loop 29 * CEs [26] --> Loop 30 * CEs [27] --> Loop 31 * CEs [28] --> Loop 32 * CEs [30] --> Loop 33 * CEs [29] --> Loop 34 ### Ranking functions of CR eval_nestedLoop__critedge3_in(V_11,V_7,V_9,V_N,V_i_1,V_j_0,V_k_0,V_m,B,C,D,E,F,G,H) * RF of phase [26,27]: [-V_j_0+V_m] * RF of phase [29]: [-V_j_0+V_m] #### Partial ranking functions of CR eval_nestedLoop__critedge3_in(V_11,V_7,V_9,V_N,V_i_1,V_j_0,V_k_0,V_m,B,C,D,E,F,G,H) * Partial RF of phase [26,27]: - RF of loop [26:1]: V_N-V_i_1-1 - RF of loop [26:1,27:1]: -V_j_0+V_m * Partial RF of phase [29]: - RF of loop [29:1]: -V_j_0+V_m popout

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all output return to Compl Integ Trans Syste 26843