Higher_Order_Rewriting_Union_Beta 2019-03-28 22.10 pair #432270248

details

property	value
status	complete
benchmark	tailrecgen.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n122.star.cs.uiowa.edu
space	Mixed_HO_12

run statistics

property	value
solver	SizeChangeTool_v2019
configuration	default
runtime (wallclock)	0.010495 seconds
cpu usage	0.009043
user time	0.003796
system time	0.005247
max virtual memory	0.0
max residence set size	4816.0

stage attributes

key	value
starexec-result	MAYBE

output

0.00/0.00	MAYBE
0.00/0.00	�[31m * theBenchmark.log2 is self looping relatively to the rules�[m
0.00/0.00	  - Rule noname.log2!18
0.00/0.00	  - Rule noname.log2!18
0.00/0.00	�[31m * theBenchmark.grec is self looping relatively to the rules�[m
0.00/0.00	  - Rule noname.grec!13
0.00/0.00	EOF

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job log

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actions all output return to Higher_Order_Rewriting_Union_Beta 2019-03-28 22.10