details

property	value
status	complete
benchmark	ohl190.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n007.star.cs.uiowa.edu
space	Mixed_CTRS_2014

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.75854 seconds
cpu usage	3.66398
user time	3.49133
system time	0.172641
max virtual memory	1.8474652E7
max residence set size	236408.0

stage attributes

key	value
starexec-result	YES

output

3.58/1.71 YES 3.61/1.72 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 3.61/1.72 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 3.61/1.72 3.61/1.72 3.61/1.72 Quasi decreasingness of the given CTRS could be proven: 3.61/1.72 3.61/1.72 (0) CTRS 3.61/1.72 (1) CTRSToQTRSProof [SOUND, 0 ms] 3.61/1.72 (2) QTRS 3.61/1.72 (3) QTRSRRRProof [EQUIVALENT, 51 ms] 3.61/1.72 (4) QTRS 3.61/1.72 (5) QTRSRRRProof [EQUIVALENT, 0 ms] 3.61/1.72 (6) QTRS 3.61/1.72 (7) AAECC Innermost [EQUIVALENT, 0 ms] 3.61/1.72 (8) QTRS 3.61/1.72 (9) DependencyPairsProof [EQUIVALENT, 0 ms] 3.61/1.72 (10) QDP 3.61/1.72 (11) DependencyGraphProof [EQUIVALENT, 0 ms] 3.61/1.72 (12) TRUE 3.61/1.72 3.61/1.72 3.61/1.72 ---------------------------------------- 3.61/1.72 3.61/1.72 (0) 3.61/1.72 Obligation: 3.61/1.72 Conditional term rewrite system: 3.61/1.72 The TRS R consists of the following rules: 3.61/1.72 3.61/1.72 b -> c 3.61/1.72 f(b) -> f(a) 3.61/1.72 3.61/1.72 The conditional TRS C consists of the following conditional rules: 3.61/1.72 3.61/1.72 a -> c <= b -> c 3.61/1.72 3.61/1.72 3.61/1.72 ---------------------------------------- 3.61/1.72 3.61/1.72 (1) CTRSToQTRSProof (SOUND) 3.61/1.72 The conditional rules have been transormed into unconditional rules according to [CTRS,AAECCNOC]. 3.61/1.72 ---------------------------------------- 3.61/1.72 3.61/1.72 (2) 3.61/1.72 Obligation: 3.61/1.72 Q restricted rewrite system: 3.61/1.72 The TRS R consists of the following rules: 3.61/1.72 3.61/1.72 a -> U1(b) 3.61/1.72 U1(c) -> c 3.61/1.72 b -> c 3.61/1.72 f(b) -> f(a) 3.61/1.72 3.61/1.72 Q is empty. 3.61/1.72 3.61/1.72 ---------------------------------------- 3.61/1.72 3.61/1.72 (3) QTRSRRRProof (EQUIVALENT) 3.61/1.72 Used ordering: 3.61/1.72 Polynomial interpretation [POLO]: 3.61/1.72 3.61/1.72 POL(U1(x_1)) = x_1 3.61/1.72 POL(a) = 1 3.61/1.72 POL(b) = 1 3.61/1.72 POL(c) = 0 3.61/1.72 POL(f(x_1)) = x_1 3.61/1.72 With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: 3.61/1.72 3.61/1.72 b -> c 3.61/1.72 3.61/1.72 3.61/1.72 3.61/1.72 3.61/1.72 ---------------------------------------- 3.61/1.72 3.61/1.72 (4) 3.61/1.72 Obligation: 3.61/1.72 Q restricted rewrite system: 3.61/1.72 The TRS R consists of the following rules: 3.61/1.72 3.61/1.72 a -> U1(b) 3.61/1.72 U1(c) -> c 3.61/1.72 f(b) -> f(a) 3.61/1.72 3.61/1.72 Q is empty. 3.61/1.72 3.61/1.72 ---------------------------------------- 3.61/1.72 3.61/1.72 (5) QTRSRRRProof (EQUIVALENT) 3.61/1.72 Used ordering: 3.61/1.72 Polynomial interpretation [POLO]: 3.61/1.72 3.61/1.72 POL(U1(x_1)) = 2*x_1 3.61/1.72 POL(a) = 0 3.61/1.72 POL(b) = 0 3.61/1.72 POL(c) = 2 3.61/1.72 POL(f(x_1)) = 2*x_1 3.61/1.72 With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: 3.61/1.72 3.61/1.72 U1(c) -> c popout

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all output return to TRS_Conditional 2019-03-28 22.59