details

property	value
status	complete
benchmark	ex06_rec.jar-obl-8.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n113.star.cs.uiowa.edu
space	From_AProVE_2014

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp2019_ITS
runtime (wallclock)	0.032314 seconds
cpu usage	0.032453
user time	0.016545
system time	0.015908
max virtual memory	113176.0
max residence set size	23068.0

stage attributes

key	value
starexec-result	NO

output

0.00/0.02 NO 0.00/0.02 0.00/0.03 Solver Timeout: 4 0.00/0.03 Global Timeout: 300 0.00/0.03 No parsing errors! 0.00/0.03 Init Location: 0 0.00/0.03 Transitions: 0.00/0.03 <l0, l3, true> 0.00/0.03 <l1, l2, (arg1 > 0) /\ (arg2 > ~(1)), par{arg1 -> undef1, arg2 -> undef2}> 0.00/0.03 <l2, l2, true, par{arg1 -> undef3, arg2 -> undef4}> 0.00/0.03 <l3, l1, true, par{arg1 -> undef5, arg2 -> undef6}> 0.00/0.03 0.00/0.03 Fresh variables: 0.00/0.03 undef1, undef2, undef3, undef4, undef5, undef6, 0.00/0.03 0.00/0.03 Undef variables: 0.00/0.03 undef1, undef2, undef3, undef4, undef5, undef6, 0.00/0.03 0.00/0.03 Abstraction variables: 0.00/0.03 0.00/0.03 Exit nodes: 0.00/0.03 0.00/0.03 Accepting locations: 0.00/0.03 0.00/0.03 Asserts: 0.00/0.03 0.00/0.03 Preprocessed LLVMGraph 0.00/0.03 Init Location: 0 0.00/0.03 Transitions: 0.00/0.03 <l0, l2, (undef5 > 0) /\ (undef6 > ~(1))> 0.00/0.03 <l2, l2, true> 0.00/0.03 0.00/0.03 Fresh variables: 0.00/0.03 undef1, undef2, undef3, undef4, undef5, undef6, 0.00/0.03 0.00/0.03 Undef variables: 0.00/0.03 undef1, undef2, undef3, undef4, undef5, undef6, 0.00/0.03 0.00/0.03 Abstraction variables: 0.00/0.03 0.00/0.03 Exit nodes: 0.00/0.03 0.00/0.03 Accepting locations: 0.00/0.03 0.00/0.03 Asserts: 0.00/0.03 0.00/0.03 ************************************************************* 0.00/0.03 ******************************************************************************************* 0.00/0.03 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 0.00/0.03 ******************************************************************************************* 0.00/0.03 0.00/0.03 Init Location: 0 0.00/0.03 Graph 0: 0.00/0.03 Transitions: 0.00/0.03 Variables: 0.00/0.03 0.00/0.03 Graph 1: 0.00/0.03 Transitions: 0.00/0.03 <l2, l2, true, {all remain the same}> 0.00/0.03 Variables: 0.00/0.03 0.00/0.03 Precedence: 0.00/0.03 Graph 0 0.00/0.03 0.00/0.03 Graph 1 0.00/0.03 <l0, l2, 0 <= undef6 /\ 1 <= undef5, {all remain the same}> 0.00/0.03 0.00/0.03 Map Locations to Subgraph: 0.00/0.03 ( 0 , 0 ) 0.00/0.03 ( 2 , 1 ) 0.00/0.03 0.00/0.03 ******************************************************************************************* 0.00/0.03 ******************************** CHECKING ASSERTIONS ******************************** 0.00/0.03 ******************************************************************************************* 0.00/0.03 0.00/0.03 Proving termination of subgraph 0 0.00/0.03 Proving termination of subgraph 1 0.00/0.03 Checking unfeasibility... 0.00/0.03 Time used: 0.001335 0.00/0.03 0.00/0.03 > No variable changes in termination graph. 0.00/0.03 Checking conditional unfeasibility... 0.00/0.03 Termination failed. Trying to show unreachability... 0.00/0.03 Proving unreachability of entry: <l0, l2, 0 <= undef6 /\ 1 <= undef5, {all remain the same}> 0.00/0.03 0.00/0.03 LOG: CALL check - Post:1 <= 0 - Process 1 0.00/0.03 * Exit transition: <l0, l2, 0 <= undef6 /\ 1 <= undef5, {all remain the same}> 0.00/0.03 * Postcondition : 1 <= 0 0.00/0.03 0.00/0.03 LOG: CALL solveLinear 0.00/0.03 0.00/0.03 LOG: RETURN solveLinear - Elapsed time: 0.000292s 0.00/0.03 �[31m> Postcondition is not implied!�[0m 0.00/0.03 0.00/0.03 LOG: RETURN check - Elapsed time: 0.000378s 0.00/0.03 Cannot prove unreachability 0.00/0.03 0.00/0.03 Proving non-termination of subgraph 1 0.00/0.03 Transitions: 0.00/0.03 <l2, l2, true, {all remain the same}> popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to Integer_Transition_Systems 2019-03-29 01.54