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Integer_Transition_Systems 2019-03-29 01.54 pair #432272825
details
property
value
status
complete
benchmark
Velroyen08-whileIncrPart.jar-obl-8.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n133.star.cs.uiowa.edu
space
From_AProVE_2014
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
18.372 seconds
cpu usage
18.3474
user time
17.2277
system time
1.11967
max virtual memory
927560.0
max residence set size
235340.0
stage attributes
key
value
starexec-result
NO
output
18.30/18.36 NO 18.30/18.36 18.30/18.36 Solver Timeout: 4 18.30/18.36 Global Timeout: 300 18.30/18.36 No parsing errors! 18.30/18.36 Init Location: 0 18.30/18.36 Transitions: 18.30/18.36 <l0, l3, true> 18.30/18.36 <l1, l2, (arg1 > 0) /\ (arg2 > ~(1)), par{arg1 -> arg2, arg2 -> undef2}> 18.30/18.36 <l2, l2, (arg1 > 0) /\ (arg1 < 4), par{arg1 -> (arg1 - 1), arg2 -> undef4}> 18.30/18.36 <l2, l2, (arg1 > 3), par{arg1 -> (arg1 + 1), arg2 -> undef6}> 18.30/18.36 <l3, l1, true, par{arg1 -> undef7, arg2 -> undef8}> 18.30/18.36 18.30/18.36 Fresh variables: 18.30/18.36 undef2, undef4, undef6, undef7, undef8, 18.30/18.36 18.30/18.36 Undef variables: 18.30/18.36 undef2, undef4, undef6, undef7, undef8, 18.30/18.36 18.30/18.36 Abstraction variables: 18.30/18.36 18.30/18.36 Exit nodes: 18.30/18.36 18.30/18.36 Accepting locations: 18.30/18.36 18.30/18.36 Asserts: 18.30/18.36 18.30/18.36 Preprocessed LLVMGraph 18.30/18.36 Init Location: 0 18.30/18.36 Transitions: 18.30/18.36 <l0, l2, (arg1 = undef8) /\ (undef7 > 0) /\ (undef8 > ~(1))> 18.30/18.36 <l2, l2, (arg1 > 0) /\ (arg1 < 4), par{arg1 -> (arg1 - 1)}> 18.30/18.36 <l2, l2, (arg1 > 3), par{arg1 -> (arg1 + 1)}> 18.30/18.36 18.30/18.36 Fresh variables: 18.30/18.36 undef2, undef4, undef6, undef7, undef8, 18.30/18.36 18.30/18.36 Undef variables: 18.30/18.36 undef2, undef4, undef6, undef7, undef8, 18.30/18.36 18.30/18.36 Abstraction variables: 18.30/18.36 18.30/18.36 Exit nodes: 18.30/18.36 18.30/18.36 Accepting locations: 18.30/18.36 18.30/18.36 Asserts: 18.30/18.36 18.30/18.36 ************************************************************* 18.30/18.36 ******************************************************************************************* 18.30/18.36 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 18.30/18.36 ******************************************************************************************* 18.30/18.36 18.30/18.36 Init Location: 0 18.30/18.36 Graph 0: 18.30/18.36 Transitions: 18.30/18.36 Variables: 18.30/18.36 18.30/18.36 Graph 1: 18.30/18.36 Transitions: 18.30/18.36 <l2, l2, 1 <= arg1 /\ arg1 <= 3, {arg1 -> -1 + arg1, rest remain the same}> 18.30/18.36 <l2, l2, 4 <= arg1, {arg1 -> 1 + arg1, rest remain the same}> 18.30/18.36 Variables: 18.30/18.36 arg1 18.30/18.36 18.30/18.36 Precedence: 18.30/18.36 Graph 0 18.30/18.36 18.30/18.36 Graph 1 18.30/18.36 <l0, l2, 0 <= undef8 /\ 1 <= undef7 /\ arg1 = undef8, {all remain the same}> 18.30/18.36 18.30/18.36 Map Locations to Subgraph: 18.30/18.36 ( 0 , 0 ) 18.30/18.36 ( 2 , 1 ) 18.30/18.36 18.30/18.36 ******************************************************************************************* 18.30/18.36 ******************************** CHECKING ASSERTIONS ******************************** 18.30/18.36 ******************************************************************************************* 18.30/18.36 18.30/18.36 Proving termination of subgraph 0 18.30/18.36 Proving termination of subgraph 1 18.30/18.36 Checking unfeasibility... 18.30/18.37 Time used: 0.002868 18.30/18.37 18.30/18.37 Checking conditional termination of SCC {l2}... 18.30/18.37 18.30/18.37 LOG: CALL solveLinear 18.30/18.37 18.30/18.37 LOG: RETURN solveLinear - Elapsed time: 0.000765s 18.30/18.37 18.30/18.37 LOG: CALL solveLinear 18.30/18.37 18.30/18.37 LOG: RETURN solveLinear - Elapsed time: 0.003019s 18.30/18.37 �[33mPiecewise ranking function: �[36mmin(-5 + 5*arg1,79 - 21*arg1)�[0m 18.30/18.37 New Graphs: 18.30/18.37 Transitions: 18.30/18.37 <l2, l2, 4 <= arg1, {arg1 -> 1 + arg1, rest remain the same}> 18.30/18.37 Variables: 18.30/18.37 arg1 18.30/18.37 Checking conditional termination of SCC {l2}...
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