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Integer_Transition_Systems 2019-03-29 01.54 pair #432273971
details
property
value
status
complete
benchmark
insertsort.t2_fixed.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n124.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
18.3774 seconds
cpu usage
18.3467
user time
17.2068
system time
1.13997
max virtual memory
1123368.0
max residence set size
384284.0
stage attributes
key
value
starexec-result
NO
output
18.27/18.37 NO 18.27/18.37 18.27/18.37 Solver Timeout: 4 18.27/18.37 Global Timeout: 300 18.27/18.37 No parsing errors! 18.27/18.37 Init Location: 0 18.27/18.37 Transitions: 18.27/18.37 <l0, l7, true> 18.27/18.37 <l1, l2, true> 18.27/18.37 <l3, l4, true> 18.27/18.37 <l4, l3, (undef9 = undef9), par{j^0 -> (~(1) + j^0), temp^0 -> undef9}> 18.27/18.37 <l4, l1, true, par{i^0 -> (1 + i^0)}> 18.27/18.37 <l2, l5, (11 <= (0 + i^0))> 18.27/18.37 <l2, l3, ((0 + i^0) <= 10), par{j^0 -> (0 + i^0)}> 18.27/18.37 <l6, l1, true, par{i^0 -> 2}> 18.27/18.37 <l7, l6, true> 18.27/18.37 18.27/18.37 Fresh variables: 18.27/18.37 undef9, 18.27/18.37 18.27/18.37 Undef variables: 18.27/18.37 undef9, 18.27/18.37 18.27/18.37 Abstraction variables: 18.27/18.37 18.27/18.37 Exit nodes: 18.27/18.37 18.27/18.37 Accepting locations: 18.27/18.37 18.27/18.37 Asserts: 18.27/18.37 18.27/18.37 Preprocessed LLVMGraph 18.27/18.37 Init Location: 0 18.27/18.37 Transitions: 18.27/18.37 <l0, l3, (i^0 = 2) /\ ((0 + 2) <= 10), par{j^0 -> (0 + 2)}> 18.27/18.37 <l3, l3, (undef9 = undef9), par{j^0 -> (~(1) + j^0)}> 18.27/18.37 <l3, l5, (11 <= (0 + (1 + i^0))), par{i^0 -> (1 + i^0)}> 18.27/18.37 <l3, l3, ((0 + (1 + i^0)) <= 10), par{i^0 -> (1 + i^0), j^0 -> (0 + (1 + i^0))}> 18.27/18.37 18.27/18.37 Fresh variables: 18.27/18.37 undef9, 18.27/18.37 18.27/18.37 Undef variables: 18.27/18.37 undef9, 18.27/18.37 18.27/18.37 Abstraction variables: 18.27/18.37 18.27/18.37 Exit nodes: 18.27/18.37 18.27/18.37 Accepting locations: 18.27/18.37 18.27/18.37 Asserts: 18.27/18.37 18.27/18.37 ************************************************************* 18.27/18.37 ******************************************************************************************* 18.27/18.37 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 18.27/18.37 ******************************************************************************************* 18.27/18.37 18.27/18.37 Init Location: 0 18.27/18.37 Graph 0: 18.27/18.37 Transitions: 18.27/18.37 Variables: 18.27/18.37 18.27/18.37 Graph 1: 18.27/18.37 Transitions: 18.27/18.37 <l3, l3, true, {j^0 -> -1 + j^0, rest remain the same}> 18.27/18.37 <l3, l3, i^0 <= 9, {i^0 -> 1 + i^0, j^0 -> 1 + i^0, rest remain the same}> 18.27/18.37 Variables: 18.27/18.37 j^0, i^0 18.27/18.37 18.27/18.37 Graph 2: 18.27/18.37 Transitions: 18.27/18.37 Variables: 18.27/18.37 18.27/18.37 Precedence: 18.27/18.37 Graph 0 18.27/18.37 18.27/18.37 Graph 1 18.27/18.37 <l0, l3, i^0 = 2, {j^0 -> 2, rest remain the same}> 18.27/18.37 18.27/18.37 Graph 2 18.27/18.37 <l3, l5, 10 <= i^0, {i^0 -> 1 + i^0, rest remain the same}> 18.27/18.37 18.27/18.37 Map Locations to Subgraph: 18.27/18.37 ( 0 , 0 ) 18.27/18.37 ( 3 , 1 ) 18.27/18.37 ( 5 , 2 ) 18.27/18.37 18.27/18.37 ******************************************************************************************* 18.27/18.37 ******************************** CHECKING ASSERTIONS ******************************** 18.27/18.37 ******************************************************************************************* 18.27/18.37 18.27/18.37 Proving termination of subgraph 0 18.27/18.37 Proving termination of subgraph 1 18.27/18.37 Checking unfeasibility... 18.27/18.37 Time used: 0.007887 18.27/18.37 18.27/18.37 Checking conditional termination of SCC {l3}... 18.27/18.37 18.27/18.37 LOG: CALL solveLinear
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