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Integer_Transition_Systems 2019-03-29 01.54 pair #432274355
details
property
value
status
complete
benchmark
p-32.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n088.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
5.42794 seconds
cpu usage
5.40997
user time
4.95796
system time
0.452001
max virtual memory
786416.0
max residence set size
128048.0
stage attributes
key
value
starexec-result
NO
output
5.36/5.42 NO 5.36/5.42 5.36/5.42 Solver Timeout: 4 5.36/5.42 Global Timeout: 300 5.36/5.42 No parsing errors! 5.36/5.42 Init Location: 0 5.36/5.42 Transitions: 5.36/5.42 <l0, l6, true> 5.36/5.42 <l1, l2, true> 5.36/5.42 <l2, l3, ((0 + (~(1) * x_5^0)) <= 0) /\ ((0 + x_5^0) <= 0) /\ (undef3 = undef3), par{Result_4^0 -> undef3}> 5.36/5.42 <l2, l4, ((0 + (~(1) * x_5^0)) <= 0) /\ (0 <= (~(1) + x_5^0)) /\ (undef7 = undef7), par{x_5^0 -> (1 + undef7)}> 5.36/5.42 <l4, l2, true> 5.36/5.42 <l2, l5, (0 <= (~(1) + (~(1) * x_5^0))) /\ (undef12 = undef12), par{x_5^0 -> (~(1) + undef12)}> 5.36/5.42 <l5, l2, true> 5.36/5.42 <l6, l1, true> 5.36/5.42 5.36/5.42 Fresh variables: 5.36/5.42 undef3, undef7, undef12, 5.36/5.42 5.36/5.42 Undef variables: 5.36/5.42 undef3, undef7, undef12, 5.36/5.42 5.36/5.42 Abstraction variables: 5.36/5.42 5.36/5.42 Exit nodes: 5.36/5.42 5.36/5.42 Accepting locations: 5.36/5.42 5.36/5.42 Asserts: 5.36/5.42 5.36/5.42 Preprocessed LLVMGraph 5.36/5.42 Init Location: 0 5.36/5.42 Transitions: 5.36/5.42 <l0, l2, true> 5.36/5.42 <l2, l3, ((0 + (~(1) * x_5^0)) <= 0) /\ ((0 + x_5^0) <= 0) /\ (undef3 = undef3)> 5.36/5.42 <l2, l2, ((0 + (~(1) * x_5^0)) <= 0) /\ (0 <= (~(1) + x_5^0)) /\ (undef7 = undef7), par{x_5^0 -> (1 + undef7)}> 5.36/5.42 <l2, l2, (0 <= (~(1) + (~(1) * x_5^0))) /\ (undef12 = undef12), par{x_5^0 -> (~(1) + undef12)}> 5.36/5.42 5.36/5.42 Fresh variables: 5.36/5.42 undef3, undef7, undef12, 5.36/5.42 5.36/5.42 Undef variables: 5.36/5.42 undef3, undef7, undef12, 5.36/5.42 5.36/5.42 Abstraction variables: 5.36/5.42 5.36/5.42 Exit nodes: 5.36/5.42 5.36/5.42 Accepting locations: 5.36/5.42 5.36/5.42 Asserts: 5.36/5.42 5.36/5.42 ************************************************************* 5.36/5.42 ******************************************************************************************* 5.36/5.42 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 5.36/5.42 ******************************************************************************************* 5.36/5.42 5.36/5.42 Init Location: 0 5.36/5.42 Graph 0: 5.36/5.42 Transitions: 5.36/5.42 Variables: 5.36/5.42 5.36/5.42 Graph 1: 5.36/5.42 Transitions: 5.36/5.42 <l2, l2, 1 <= x_5^0, {x_5^0 -> 1 + undef7, rest remain the same}> 5.36/5.42 <l2, l2, 1 + x_5^0 <= 0, {x_5^0 -> -1 + undef12, rest remain the same}> 5.36/5.42 Variables: 5.36/5.42 x_5^0 5.36/5.42 5.36/5.42 Graph 2: 5.36/5.42 Transitions: 5.36/5.42 Variables: 5.36/5.42 5.36/5.42 Precedence: 5.36/5.42 Graph 0 5.36/5.42 5.36/5.42 Graph 1 5.36/5.42 <l0, l2, true, {all remain the same}> 5.36/5.42 5.36/5.42 Graph 2 5.36/5.42 <l2, l3, x_5^0 = 0, {all remain the same}> 5.36/5.42 5.36/5.42 Map Locations to Subgraph: 5.36/5.42 ( 0 , 0 ) 5.36/5.42 ( 2 , 1 ) 5.36/5.42 ( 3 , 2 ) 5.36/5.42 5.36/5.42 ******************************************************************************************* 5.36/5.42 ******************************** CHECKING ASSERTIONS ******************************** 5.36/5.42 ******************************************************************************************* 5.36/5.42 5.36/5.42 Proving termination of subgraph 0 5.36/5.42 Proving termination of subgraph 1 5.36/5.42 Checking unfeasibility... 5.36/5.42 Time used: 0.002321 5.36/5.42 5.36/5.42 Checking conditional termination of SCC {l2}... 5.36/5.42 5.36/5.42 LOG: CALL solveLinear 5.36/5.42
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