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Integer_Transition_Systems 2019-03-29 01.54 pair #432274421
details
property
value
status
complete
benchmark
small01.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n087.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
43.3267 seconds
cpu usage
43.3115
user time
41.4017
system time
1.90981
max virtual memory
943740.0
max residence set size
271088.0
stage attributes
key
value
starexec-result
NO
output
43.26/43.32 NO 43.26/43.32 43.26/43.32 Solver Timeout: 4 43.26/43.32 Global Timeout: 300 43.26/43.32 No parsing errors! 43.26/43.32 Init Location: 0 43.26/43.32 Transitions: 43.26/43.32 <l0, l5, true> 43.26/43.32 <l1, l2, true, par{x^0 -> (~(1) + x^0)}> 43.26/43.32 <l2, l3, (undef3 = __disjvr_0^0) /\ (__disjvr_0^0 = undef3), par{__disjvr_0^0 -> undef3}> 43.26/43.32 <l3, l1, true> 43.26/43.32 <l4, l1, (1 <= (0 + x^0))> 43.26/43.32 <l5, l4, true> 43.26/43.32 43.26/43.32 Fresh variables: 43.26/43.32 undef3, 43.26/43.32 43.26/43.32 Undef variables: 43.26/43.32 undef3, 43.26/43.32 43.26/43.32 Abstraction variables: 43.26/43.32 43.26/43.32 Exit nodes: 43.26/43.32 43.26/43.32 Accepting locations: 43.26/43.32 43.26/43.32 Asserts: 43.26/43.32 43.26/43.32 Preprocessed LLVMGraph 43.26/43.32 Init Location: 0 43.26/43.32 Transitions: 43.26/43.32 <l0, l1, (1 <= (0 + x^0))> 43.26/43.32 <l1, l1, (undef3 = __disjvr_0^0) /\ (__disjvr_0^0 = undef3), par{__disjvr_0^0 -> undef3, x^0 -> (~(1) + x^0)}> 43.26/43.32 43.26/43.32 Fresh variables: 43.26/43.32 undef3, 43.26/43.32 43.26/43.32 Undef variables: 43.26/43.32 undef3, 43.26/43.32 43.26/43.32 Abstraction variables: 43.26/43.32 43.26/43.32 Exit nodes: 43.26/43.32 43.26/43.32 Accepting locations: 43.26/43.32 43.26/43.32 Asserts: 43.26/43.32 43.26/43.32 ************************************************************* 43.26/43.32 ******************************************************************************************* 43.26/43.32 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 43.26/43.32 ******************************************************************************************* 43.26/43.32 43.26/43.32 Init Location: 0 43.26/43.32 Graph 0: 43.26/43.32 Transitions: 43.26/43.32 Variables: 43.26/43.32 43.26/43.32 Graph 1: 43.26/43.32 Transitions: 43.26/43.32 <l1, l1, __disjvr_0^0 = undef3, {__disjvr_0^0 -> undef3, x^0 -> -1 + x^0, rest remain the same}> 43.26/43.32 Variables: 43.26/43.32 __disjvr_0^0, x^0 43.26/43.32 43.26/43.32 Precedence: 43.26/43.32 Graph 0 43.26/43.32 43.26/43.32 Graph 1 43.26/43.32 <l0, l1, 1 <= x^0, {all remain the same}> 43.26/43.32 43.26/43.32 Map Locations to Subgraph: 43.26/43.32 ( 0 , 0 ) 43.26/43.32 ( 1 , 1 ) 43.26/43.32 43.26/43.32 ******************************************************************************************* 43.26/43.32 ******************************** CHECKING ASSERTIONS ******************************** 43.26/43.32 ******************************************************************************************* 43.26/43.32 43.26/43.32 Proving termination of subgraph 0 43.26/43.32 Proving termination of subgraph 1 43.26/43.32 Checking unfeasibility... 43.26/43.32 Time used: 0.002084 43.26/43.32 43.26/43.32 Checking conditional termination of SCC {l1}... 43.26/43.32 43.26/43.32 LOG: CALL solveLinear 43.26/43.32 43.26/43.32 LOG: RETURN solveLinear - Elapsed time: 0.000500s 43.26/43.32 43.26/43.32 LOG: CALL solveLinear 43.26/43.32 43.26/43.32 LOG: RETURN solveLinear - Elapsed time: 0.001398s 43.26/43.32 Trying to remove transition: <l1, l1, __disjvr_0^0 = undef3, {__disjvr_0^0 -> undef3, x^0 -> -1 + x^0, rest remain the same}> 43.26/43.32 Solving with 1 template(s). 43.26/43.32 43.26/43.32 LOG: CALL solveNonLinearGetFirstSolution 43.26/43.32 43.26/43.32 LOG: RETURN solveNonLinearGetFirstSolution - Elapsed time: 0.004536s 43.26/43.32 Time used: 0.004392 43.26/43.32 Solving with 1 template(s).
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return to Integer_Transition_Systems 2019-03-29 01.54