details

property	value
status	complete
benchmark	ppblock.t2.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n003.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp2019_ITS
runtime (wallclock)	127.429 seconds
cpu usage	127.286
user time	120.6
system time	6.68603
max virtual memory	1189372.0
max residence set size	421872.0

stage attributes

key	value
starexec-result	NO

output

127.20/127.42 NO 127.20/127.42 127.20/127.42 Solver Timeout: 4 127.20/127.42 Global Timeout: 300 127.20/127.42 No parsing errors! 127.20/127.42 Init Location: 0 127.20/127.42 Transitions: 127.20/127.42 <l0, l8, true> 127.20/127.42 <l1, l2, ((0 + conditional^0) <= 1)> 127.20/127.42 <l1, l3, (2 <= (0 + conditional^0)), par{num^0 -> (1 + num^0)}> 127.20/127.42 <l4, l3, ((0 + conditional^0) <= 1), par{IoCreateDevice^0 -> 0, i^0 -> (1 + i^0), status^0 -> 1}> 127.20/127.42 <l4, l1, (2 <= (0 + conditional^0)) /\ (undef37 = undef37), par{IoCreateDevice^0 -> 0, Pdo^0 -> 0, conditional^0 -> undef37}> 127.20/127.42 <l2, l5, true, par{PPBunlockInits^0 -> 1, num^0 -> 0}> 127.20/127.42 <l5, l2, true> 127.20/127.42 <l6, l2, ((0 + DName^0) <= 0)> 127.20/127.42 <l6, l4, (1 <= (0 + DName^0)) /\ (undef77 = undef77), par{IoCreateDevice^0 -> 1, conditional^0 -> undef77}> 127.20/127.42 <l3, l2, ((0 + Pdolen^0) <= (0 + i^0)), par{status^0 -> 0}> 127.20/127.42 <l3, l6, ((1 + i^0) <= (0 + Pdolen^0)) /\ (undef91 = undef91), par{DName^0 -> undef91, PPBlockInits^0 -> 1, status^0 -> 0}> 127.20/127.42 <l7, l3, (undef108 = undef108) /\ (undef106 = undef106), par{IoCreateDevice^0 -> 0, PPBlockInits^0 -> 1, PPBunlockInits^0 -> 0, Pdolen^0 -> undef106, i^0 -> undef108, status^0 -> 0}> 127.20/127.42 <l8, l7, true> 127.20/127.42 127.20/127.42 Fresh variables: 127.20/127.42 undef37, undef77, undef91, undef106, undef108, 127.20/127.42 127.20/127.42 Undef variables: 127.20/127.42 undef37, undef77, undef91, undef106, undef108, 127.20/127.42 127.20/127.42 Abstraction variables: 127.20/127.42 127.20/127.42 Exit nodes: 127.20/127.42 127.20/127.42 Accepting locations: 127.20/127.42 127.20/127.42 Asserts: 127.20/127.42 127.20/127.42 Preprocessed LLVMGraph 127.20/127.42 Init Location: 0 127.20/127.42 Transitions: 127.20/127.42 <l0, l3, (Pdolen^0 = undef106) /\ (i^0 = undef108) /\ (undef108 = undef108) /\ (undef106 = undef106)> 127.20/127.42 <l2, l2, true, par{num^0 -> 0}> 127.20/127.42 <l3, l2, ((0 + Pdolen^0) <= (0 + i^0))> 127.20/127.42 <l3, l2, ((1 + i^0) <= (0 + Pdolen^0)) /\ (undef91 = undef91) /\ ((0 + undef91) <= 0)> 127.20/127.42 <l3, l3, ((1 + i^0) <= (0 + Pdolen^0)) /\ (undef91 = undef91) /\ (1 <= (0 + undef91)) /\ (undef77 = undef77) /\ ((0 + undef77) <= 1), par{i^0 -> (1 + i^0)}> 127.20/127.42 <l3, l2, ((1 + i^0) <= (0 + Pdolen^0)) /\ (undef91 = undef91) /\ (1 <= (0 + undef91)) /\ (undef77 = undef77) /\ (2 <= (0 + undef77)) /\ (undef37 = undef37) /\ ((0 + undef37) <= 1)> 127.20/127.42 <l3, l3, ((1 + i^0) <= (0 + Pdolen^0)) /\ (undef91 = undef91) /\ (1 <= (0 + undef91)) /\ (undef77 = undef77) /\ (2 <= (0 + undef77)) /\ (undef37 = undef37) /\ (2 <= (0 + undef37)), par{num^0 -> (1 + num^0)}> 127.20/127.42 127.20/127.42 Fresh variables: 127.20/127.42 undef37, undef77, undef91, undef106, undef108, 127.20/127.42 127.20/127.42 Undef variables: 127.20/127.42 undef37, undef77, undef91, undef106, undef108, 127.20/127.42 127.20/127.42 Abstraction variables: 127.20/127.42 127.20/127.42 Exit nodes: 127.20/127.42 127.20/127.42 Accepting locations: 127.20/127.42 127.20/127.42 Asserts: 127.20/127.42 127.20/127.42 ************************************************************* 127.20/127.42 ******************************************************************************************* 127.20/127.42 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 127.20/127.42 ******************************************************************************************* 127.20/127.42 127.20/127.42 Init Location: 0 127.20/127.42 Graph 0: 127.20/127.42 Transitions: 127.20/127.42 Variables: 127.20/127.42 127.20/127.42 Graph 1: 127.20/127.42 Transitions: 127.20/127.42 <l3, l3, 1 + i^0 <= Pdolen^0 /\ 1 <= undef91 /\ undef77 <= 1, {i^0 -> 1 + i^0, rest remain the same}> 127.20/127.42 <l3, l3, 1 + i^0 <= Pdolen^0 /\ 1 <= undef91 /\ 2 <= undef37 /\ 2 <= undef77, {num^0 -> 1 + num^0, rest remain the same}> 127.20/127.42 Variables: 127.20/127.42 Pdolen^0, i^0, num^0 127.20/127.42 127.20/127.42 Graph 2: 127.20/127.42 Transitions: 127.20/127.42 <l2, l2, true, {num^0 -> 0, rest remain the same}> 127.20/127.42 Variables: 127.20/127.42 127.20/127.42 Precedence: 127.20/127.42 Graph 0 127.20/127.42 127.20/127.42 Graph 1 127.20/127.42 <l0, l3, Pdolen^0 = undef106 /\ i^0 = undef108, {all remain the same}> 127.20/127.42 127.20/127.42 Graph 2 127.20/127.42 <l3, l2, Pdolen^0 <= i^0, {all remain the same}> 127.20/127.42 <l3, l2, undef91 <= 0 /\ 1 + i^0 <= Pdolen^0, {all remain the same}> 127.20/127.42 <l3, l2, 1 + i^0 <= Pdolen^0 /\ 1 <= undef91 /\ 2 <= undef77 /\ undef37 <= 1, {all remain the same}> 127.20/127.42 127.20/127.42 Map Locations to Subgraph: 127.20/127.42 ( 0 , 0 ) 127.20/127.42 ( 2 , 2 ) 127.20/127.42 ( 3 , 1 ) 127.20/127.42 127.20/127.42 ******************************************************************************************* 127.20/127.42 ******************************** CHECKING ASSERTIONS ******************************** popout

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all output return to Integer_Transition_Systems 2019-03-29 01.54