Integer_Transition_Systems 2019-03-29 01.54 pair #432275478

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details
property value
status timeout (wallclock)
benchmark cover.t2.smt2
ran by Akihisa Yamada
cpu timeout 1200 seconds
wallclock timeout 300 seconds
memory limit 137438953472 bytes
space From_T2
run statistics
property value
solver Ctrl
configuration Transition
runtime (wallclock) 300.044 seconds
cpu usage 300.0
user time 295.67
system time 4.33
max virtual memory 6130024.0
max residence set size 63964.0
stage attributes

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