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Integer_Transition_Systems 2019-03-29 01.54 pair #432275573
details
property
value
status
complete
benchmark
n-48.t2_fixed.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n078.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
32.469 seconds
cpu usage
32.4518
user time
31.01
system time
1.44182
max virtual memory
1001136.0
max residence set size
334156.0
stage attributes
key
value
starexec-result
NO
output
32.42/32.46 NO 32.42/32.46 32.42/32.46 Solver Timeout: 4 32.42/32.46 Global Timeout: 300 32.42/32.46 No parsing errors! 32.42/32.46 Init Location: 0 32.42/32.46 Transitions: 32.42/32.46 <l0, l7, true> 32.42/32.46 <l1, l2, true> 32.42/32.46 <l3, l4, ((1 + i_5^0) <= 0) /\ (undef12 = 0) /\ (undef10 = (0 + undef12)), par{Result_4^0 -> (0 + undef10), ___cil_tmp4_8^0 -> undef10, ___retres3_7^0 -> undef12}> 32.42/32.46 <l3, l5, (0 <= (0 + i_5^0)), par{i_5^0 -> ((0 + (~(1) * d_6^0)) + i_5^0)}> 32.42/32.46 <l5, l3, true> 32.42/32.46 <l2, l4, ((0 + (~(1) * d_6^0)) <= 0) /\ (undef33 = 0) /\ (undef31 = (0 + undef33)), par{Result_4^0 -> (0 + undef31), ___cil_tmp4_8^0 -> undef31, ___retres3_7^0 -> undef33}> 32.42/32.46 <l2, l3, (0 <= (~(1) + (~(1) * d_6^0)))> 32.42/32.46 <l4, l6, (undef46 = 0) /\ (undef44 = (0 + undef46)), par{Result_4^0 -> (0 + undef44), ___cil_tmp2_10^0 -> undef44, ___retres1_9^0 -> undef46}> 32.42/32.46 <l7, l1, true> 32.42/32.46 32.42/32.46 Fresh variables: 32.42/32.46 undef10, undef12, undef31, undef33, undef44, undef46, 32.42/32.46 32.42/32.46 Undef variables: 32.42/32.46 undef10, undef12, undef31, undef33, undef44, undef46, 32.42/32.46 32.42/32.46 Abstraction variables: 32.42/32.46 32.42/32.46 Exit nodes: 32.42/32.46 32.42/32.46 Accepting locations: 32.42/32.46 32.42/32.46 Asserts: 32.42/32.46 32.42/32.46 Preprocessed LLVMGraph 32.42/32.46 Init Location: 0 32.42/32.46 Transitions: 32.42/32.46 <l0, l6, ((0 + (~(1) * d_6^0)) <= 0) /\ (undef33 = 0) /\ (undef31 = (0 + undef33)) /\ (undef46 = 0) /\ (undef44 = (0 + undef46))> 32.42/32.46 <l0, l3, (0 <= (~(1) + (~(1) * d_6^0)))> 32.42/32.46 <l3, l6, ((1 + i_5^0) <= 0) /\ (undef12 = 0) /\ (undef10 = (0 + undef12)) /\ (undef46 = 0) /\ (undef44 = (0 + undef46))> 32.42/32.46 <l3, l3, (0 <= (0 + i_5^0)), par{i_5^0 -> ((0 + (~(1) * d_6^0)) + i_5^0)}> 32.42/32.46 32.42/32.46 Fresh variables: 32.42/32.46 undef10, undef12, undef31, undef33, undef44, undef46, 32.42/32.46 32.42/32.46 Undef variables: 32.42/32.46 undef10, undef12, undef31, undef33, undef44, undef46, 32.42/32.46 32.42/32.46 Abstraction variables: 32.42/32.46 32.42/32.46 Exit nodes: 32.42/32.46 32.42/32.46 Accepting locations: 32.42/32.46 32.42/32.46 Asserts: 32.42/32.46 32.42/32.46 ************************************************************* 32.42/32.46 ******************************************************************************************* 32.42/32.46 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 32.42/32.46 ******************************************************************************************* 32.42/32.46 32.42/32.46 Init Location: 0 32.42/32.46 Graph 0: 32.42/32.46 Transitions: 32.42/32.46 Variables: 32.42/32.46 32.42/32.46 Graph 1: 32.42/32.46 Transitions: 32.42/32.46 <l3, l3, 0 <= i_5^0, {i_5^0 -> -d_6^0 + i_5^0, rest remain the same}> 32.42/32.46 Variables: 32.42/32.46 d_6^0, i_5^0 32.42/32.46 32.42/32.46 Graph 2: 32.42/32.46 Transitions: 32.42/32.46 Variables: 32.42/32.46 32.42/32.46 Precedence: 32.42/32.46 Graph 0 32.42/32.46 32.42/32.46 Graph 1 32.42/32.46 <l0, l3, 1 + d_6^0 <= 0, {all remain the same}> 32.42/32.46 32.42/32.46 Graph 2 32.42/32.46 <l0, l6, 0 <= d_6^0 /\ undef31 = undef33 /\ undef33 = 0 /\ undef44 = undef46 /\ undef46 = 0, {all remain the same}> 32.42/32.46 <l3, l6, 1 + i_5^0 <= 0 /\ undef10 = undef12 /\ undef12 = 0 /\ undef44 = undef46 /\ undef46 = 0, {all remain the same}> 32.42/32.46 32.42/32.46 Map Locations to Subgraph: 32.42/32.46 ( 0 , 0 ) 32.42/32.46 ( 3 , 1 ) 32.42/32.46 ( 6 , 2 ) 32.42/32.46 32.42/32.46 ******************************************************************************************* 32.42/32.46 ******************************** CHECKING ASSERTIONS ******************************** 32.42/32.46 ******************************************************************************************* 32.42/32.46 32.42/32.46 Proving termination of subgraph 0 32.42/32.46 Proving termination of subgraph 1 32.42/32.46 Checking unfeasibility... 32.42/32.46 Time used: 0.0023 32.42/32.46 32.42/32.46 Checking conditional termination of SCC {l3}... 32.42/32.46 32.42/32.46 LOG: CALL solveLinear
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