details

property	value
status	complete
benchmark	ex31.t2_fixed.smt2
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n144.star.cs.uiowa.edu
space	From_T2

run statistics

property	value
solver	VeryMax-termCOMP17
configuration	termcomp2019_ITS
runtime (wallclock)	5.31281 seconds
cpu usage	5.31231
user time	4.60587
system time	0.706441
max virtual memory	1030532.0
max residence set size	362044.0

stage attributes

key	value
starexec-result	NO

output

5.24/5.31 NO 5.24/5.31 5.24/5.31 Solver Timeout: 4 5.24/5.31 Global Timeout: 300 5.24/5.31 No parsing errors! 5.24/5.31 Init Location: 0 5.24/5.31 Transitions: 5.24/5.31 <l0, l6, true> 5.24/5.31 <l1, l2, (undef1 = undef1), par{hi^0 -> undef1}> 5.24/5.31 <l1, l2, (undef4 = undef4), par{lo^0 -> undef4}> 5.24/5.31 <l3, l4, ((0 + lo^0) <= (0 + hi^0))> 5.24/5.31 <l3, l1, ((1 + hi^0) <= (0 + lo^0))> 5.24/5.31 <l2, l3, true> 5.24/5.31 <l5, l2, true, par{hi^0 -> 0, lo^0 -> 99}> 5.24/5.31 <l6, l5, true> 5.24/5.31 5.24/5.31 Fresh variables: 5.24/5.31 undef1, undef4, 5.24/5.31 5.24/5.31 Undef variables: 5.24/5.31 undef1, undef4, 5.24/5.31 5.24/5.31 Abstraction variables: 5.24/5.31 5.24/5.31 Exit nodes: 5.24/5.31 5.24/5.31 Accepting locations: 5.24/5.31 5.24/5.31 Asserts: 5.24/5.31 5.24/5.31 Preprocessed LLVMGraph 5.24/5.31 Init Location: 0 5.24/5.31 Transitions: 5.24/5.31 <l0, l2, (hi^0 = 0) /\ (lo^0 = 99)> 5.24/5.31 <l2, l4, ((0 + lo^0) <= (0 + hi^0))> 5.24/5.31 <l2, l2, ((1 + hi^0) <= (0 + lo^0)) /\ (undef1 = undef1), par{hi^0 -> undef1}> 5.24/5.31 <l2, l2, ((1 + hi^0) <= (0 + lo^0)) /\ (undef4 = undef4), par{lo^0 -> undef4}> 5.24/5.31 5.24/5.31 Fresh variables: 5.24/5.31 undef1, undef4, 5.24/5.31 5.24/5.31 Undef variables: 5.24/5.31 undef1, undef4, 5.24/5.31 5.24/5.31 Abstraction variables: 5.24/5.31 5.24/5.31 Exit nodes: 5.24/5.31 5.24/5.31 Accepting locations: 5.24/5.31 5.24/5.31 Asserts: 5.24/5.31 5.24/5.31 ************************************************************* 5.24/5.31 ******************************************************************************************* 5.24/5.31 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 5.24/5.31 ******************************************************************************************* 5.24/5.31 5.24/5.31 Init Location: 0 5.24/5.31 Graph 0: 5.24/5.31 Transitions: 5.24/5.31 Variables: 5.24/5.31 5.24/5.31 Graph 1: 5.24/5.31 Transitions: 5.24/5.31 <l2, l2, 1 + hi^0 <= lo^0, {hi^0 -> undef1, rest remain the same}> 5.24/5.31 <l2, l2, 1 + hi^0 <= lo^0, {lo^0 -> undef4, rest remain the same}> 5.24/5.31 Variables: 5.24/5.31 hi^0, lo^0 5.24/5.31 5.24/5.31 Graph 2: 5.24/5.31 Transitions: 5.24/5.31 Variables: 5.24/5.31 5.24/5.31 Precedence: 5.24/5.31 Graph 0 5.24/5.31 5.24/5.31 Graph 1 5.24/5.31 <l0, l2, hi^0 = 0 /\ lo^0 = 99, {all remain the same}> 5.24/5.31 5.24/5.31 Graph 2 5.24/5.31 <l2, l4, lo^0 <= hi^0, {all remain the same}> 5.24/5.31 5.24/5.31 Map Locations to Subgraph: 5.24/5.31 ( 0 , 0 ) 5.24/5.31 ( 2 , 1 ) 5.24/5.31 ( 4 , 2 ) 5.24/5.31 5.24/5.31 ******************************************************************************************* 5.24/5.31 ******************************** CHECKING ASSERTIONS ******************************** 5.24/5.31 ******************************************************************************************* 5.24/5.31 5.24/5.31 Proving termination of subgraph 0 5.24/5.31 Proving termination of subgraph 1 5.24/5.31 Checking unfeasibility... 5.24/5.31 Time used: 0.003632 5.24/5.31 5.24/5.31 Checking conditional termination of SCC {l2}... 5.24/5.31 5.24/5.31 LOG: CALL solveLinear 5.24/5.31 popout

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all output return to Integer_Transition_Systems 2019-03-29 01.54